mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2026-04-21 08:17:40 +00:00
Teach if-converter to be more careful with predicating instructions that would
take multiple cycles to decode. For the current if-converter clients (actually only ARM), the instructions that are predicated on false are not nops. They would still take machine cycles to decode. Micro-coded instructions such as LDM / STM can potentially take multiple cycles to decode. If-converter should take treat them as non-micro-coded simple instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113570 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
@@ -416,6 +416,6 @@ bool TargetInstrInfoImpl::isSchedulingBoundary(const MachineInstr *MI,
|
||||
|
||||
// Default implementation of CreateTargetPostRAHazardRecognizer.
|
||||
ScheduleHazardRecognizer *TargetInstrInfoImpl::
|
||||
CreateTargetPostRAHazardRecognizer(const InstrItineraryData &II) const {
|
||||
CreateTargetPostRAHazardRecognizer(const InstrItineraryData *II) const {
|
||||
return (ScheduleHazardRecognizer *)new PostRAHazardRecognizer(II);
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user