diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index d8fd809c4b0..8bfefdfb3a3 100644 --- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -1808,29 +1808,32 @@ static StringRef SplitMnemonic(StringRef Mnemonic, Mnemonic == "vqdmlal" || Mnemonic == "bics")) return Mnemonic; - // First, split out any predication code. - unsigned CC = StringSwitch(Mnemonic.substr(Mnemonic.size()-2)) - .Case("eq", ARMCC::EQ) - .Case("ne", ARMCC::NE) - .Case("hs", ARMCC::HS) - .Case("cs", ARMCC::HS) - .Case("lo", ARMCC::LO) - .Case("cc", ARMCC::LO) - .Case("mi", ARMCC::MI) - .Case("pl", ARMCC::PL) - .Case("vs", ARMCC::VS) - .Case("vc", ARMCC::VC) - .Case("hi", ARMCC::HI) - .Case("ls", ARMCC::LS) - .Case("ge", ARMCC::GE) - .Case("lt", ARMCC::LT) - .Case("gt", ARMCC::GT) - .Case("le", ARMCC::LE) - .Case("al", ARMCC::AL) - .Default(~0U); - if (CC != ~0U) { - Mnemonic = Mnemonic.slice(0, Mnemonic.size() - 2); - PredicationCode = CC; + // First, split out any predication code. Ignore mnemonics we know aren't + // predicated but do have a carry-set and so weren't caught above. + if (Mnemonic != "adcs") { + unsigned CC = StringSwitch(Mnemonic.substr(Mnemonic.size()-2)) + .Case("eq", ARMCC::EQ) + .Case("ne", ARMCC::NE) + .Case("hs", ARMCC::HS) + .Case("cs", ARMCC::HS) + .Case("lo", ARMCC::LO) + .Case("cc", ARMCC::LO) + .Case("mi", ARMCC::MI) + .Case("pl", ARMCC::PL) + .Case("vs", ARMCC::VS) + .Case("vc", ARMCC::VC) + .Case("hi", ARMCC::HI) + .Case("ls", ARMCC::LS) + .Case("ge", ARMCC::GE) + .Case("lt", ARMCC::LT) + .Case("gt", ARMCC::GT) + .Case("le", ARMCC::LE) + .Case("al", ARMCC::AL) + .Default(~0U); + if (CC != ~0U) { + Mnemonic = Mnemonic.slice(0, Mnemonic.size() - 2); + PredicationCode = CC; + } } // Next, determine if we have a carry setting bit. We explicitly ignore all diff --git a/test/MC/ARM/basic-arm-instructions.s b/test/MC/ARM/basic-arm-instructions.s new file mode 100644 index 00000000000..cf90a232eb8 --- /dev/null +++ b/test/MC/ARM/basic-arm-instructions.s @@ -0,0 +1,31 @@ +@ RUN: llvm-mc -triple=armv7-apple-darwin -show-encoding < %s | FileCheck %s + .syntax unified + .globl _func +_func: +@ CHECK: _func + +@ ADC (immediate) + adc r1, r2, #0xf + adc r1, r2, #0xf0 + adc r1, r2, #0xf00 + adc r1, r2, #0xf000 + adc r1, r2, #0xf0000 + adc r1, r2, #0xf00000 + adc r1, r2, #0xf000000 + adc r1, r2, #0xf0000000 + adc r1, r2, #0xf000000f + adcs r1, r2, #0xf00 + adcseq r1, r2, #0xf00 + +@ CHECK: adc r1, r2, #15 @ encoding: [0x0f,0x10,0xa2,0xe2] +@ CHECK: adc r1, r2, #240 @ encoding: [0xf0,0x10,0xa2,0xe2] +@ CHECK: adc r1, r2, #3840 @ encoding: [0x0f,0x1c,0xa2,0xe2] +@ CHECK: adc r1, r2, #61440 @ encoding: [0x0f,0x1a,0xa2,0xe2] +@ CHECK: adc r1, r2, #983040 @ encoding: [0x0f,0x18,0xa2,0xe2] +@ CHECK: adc r1, r2, #15728640 @ encoding: [0x0f,0x16,0xa2,0xe2] +@ CHECK: adc r1, r2, #251658240 @ encoding: [0x0f,0x14,0xa2,0xe2] +@ CHECK: adc r1, r2, #4026531840 @ encoding: [0x0f,0x12,0xa2,0xe2] +@ CHECK: adc r1, r2, #4026531855 @ encoding: [0xff,0x12,0xa2,0xe2] + +@ CHECK: adcs r1, r2, #3840 @ encoding: [0x0f,0x1c,0xb2,0xe2] +@ CHECK: adcseq r1, r2, #3840 @ encoding: [0x0f,0x1c,0xb2,0x02]