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Modified the Enhanced Disassembler to create and

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cache disassemblers according to the string value
of the target triple, not according to the enum
of the triple CPU.  The reason for this is that
certain attributes of the instruction set are not
reflected in the enum, but only in the string.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149773 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Sean Callanan 2012-02-04 07:45:35 +00:00
parent 0aad7d274d
commit 3f4f34c7ba
3 changed files with 40 additions and 31 deletions
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42
lib/MC/MCDisassembler/EDDisassembler.cpp
View File

@ -95,16 +95,23 @@ static int getLLVMSyntaxVariant(Triple::ArchType arch,
EDDisassembler *EDDisassembler::getDisassembler(Triple::ArchType arch, EDDisassembler *EDDisassembler::getDisassembler(Triple::ArchType arch,
AssemblySyntax syntax) { AssemblySyntax syntax) {
const char *triple = tripleFromArch(arch);
return getDisassembler(StringRef(triple), syntax);
}
EDDisassembler *EDDisassembler::getDisassembler(StringRef str,
AssemblySyntax syntax) {
CPUKey key; CPUKey key;
key.Arch = arch; key.Triple = str.str();
key.Syntax = syntax; key.Syntax = syntax;
EDDisassembler::DisassemblerMap_t::iterator i = sDisassemblers.find(key); EDDisassembler::DisassemblerMap_t::iterator i = sDisassemblers.find(key);
if (i != sDisassemblers.end()) { if (i != sDisassemblers.end()) {
return i->second; return i->second;
} else { }
EDDisassembler* sdd = new EDDisassembler(key); else {
EDDisassembler *sdd = new EDDisassembler(key);
if (!sdd->valid()) { if (!sdd->valid()) {
delete sdd; delete sdd;
return NULL; return NULL;
@ -116,10 +123,7 @@ EDDisassembler *EDDisassembler::getDisassembler(Triple::ArchType arch,
} }
return NULL; return NULL;
}
EDDisassembler *EDDisassembler::getDisassembler(StringRef str,
AssemblySyntax syntax) {
return getDisassembler(Triple(str).getArch(), syntax); return getDisassembler(Triple(str).getArch(), syntax);
} }
@ -127,21 +131,20 @@ EDDisassembler::EDDisassembler(CPUKey &key) :
Valid(false), Valid(false),
HasSemantics(false), HasSemantics(false),
ErrorStream(nulls()), ErrorStream(nulls()),
Key(key) { Key(key),
const char *triple = tripleFromArch(key.Arch); TgtTriple(key.Triple.c_str()) {
if (TgtTriple.getArch() == Triple::InvalidArch)
if (!triple)
return; return;
LLVMSyntaxVariant = getLLVMSyntaxVariant(key.Arch, key.Syntax); LLVMSyntaxVariant = getLLVMSyntaxVariant(TgtTriple.getArch(), key.Syntax);
if (LLVMSyntaxVariant < 0) if (LLVMSyntaxVariant < 0)
return; return;
std::string tripleString(triple); std::string tripleString(key.Triple);
std::string errorString; std::string errorString;
Tgt = TargetRegistry::lookupTarget(tripleString, Tgt = TargetRegistry::lookupTarget(key.Triple,
errorString); errorString);
if (!Tgt) if (!Tgt)
@ -260,7 +263,7 @@ void EDDisassembler::initMaps(const MCRegisterInfo &registerInfo) {
RegRMap[registerName] = registerIndex; RegRMap[registerName] = registerIndex;
} }
switch (Key.Arch) { switch (TgtTriple.getArch()) {
default: default:
break; break;
case Triple::x86: case Triple::x86:
@ -328,7 +331,7 @@ int EDDisassembler::parseInst(SmallVectorImpl<MCParsedAsmOperand*> &operands,
const std::string &str) { const std::string &str) {
int ret = 0; int ret = 0;
switch (Key.Arch) { switch (TgtTriple.getArch()) {
default: default:
return -1; return -1;
case Triple::x86: case Triple::x86:
@ -353,8 +356,7 @@ int EDDisassembler::parseInst(SmallVectorImpl<MCParsedAsmOperand*> &operands,
context, *streamer, context, *streamer,
*AsmInfo)); *AsmInfo));
StringRef triple = tripleFromArch(Key.Arch); OwningPtr<MCSubtargetInfo> STI(Tgt->createMCSubtargetInfo(Key.Triple.c_str(), "", ""));
OwningPtr<MCSubtargetInfo> STI(Tgt->createMCSubtargetInfo(triple, "", ""));
OwningPtr<MCTargetAsmParser> OwningPtr<MCTargetAsmParser>
TargetParser(Tgt->createMCAsmParser(*STI, *genericParser)); TargetParser(Tgt->createMCAsmParser(*STI, *genericParser));

13
lib/MC/MCDisassembler/EDDisassembler.h
View File

@ -25,6 +25,7 @@
#include <map> #include <map>
#include <set> #include <set>
#include <string>
#include <vector> #include <vector>
namespace llvm { namespace llvm {
@ -74,21 +75,21 @@ struct EDDisassembler {
/// pair /// pair
struct CPUKey { struct CPUKey {
/// The architecture type /// The architecture type
llvm::Triple::ArchType Arch; std::string Triple;
/// The assembly syntax /// The assembly syntax
AssemblySyntax Syntax; AssemblySyntax Syntax;
/// operator== - Equality operator /// operator== - Equality operator
bool operator==(const CPUKey &key) const { bool operator==(const CPUKey &key) const {
return (Arch == key.Arch && return (Triple == key.Triple &&
Syntax == key.Syntax); Syntax == key.Syntax);
} }
/// operator< - Less-than operator /// operator< - Less-than operator
bool operator<(const CPUKey &key) const { bool operator<(const CPUKey &key) const {
return ((Arch < key.Arch) || return ((Triple < key.Triple) ||
((Arch == key.Arch) && Syntax < (key.Syntax))); ((Triple == key.Triple) && Syntax < (key.Syntax)));
} }
}; };
@ -126,8 +127,10 @@ struct EDDisassembler {
/// The stream to write errors to /// The stream to write errors to
llvm::raw_ostream &ErrorStream; llvm::raw_ostream &ErrorStream;
/// The architecture/syntax pair for the current architecture /// The triple/syntax pair for the current architecture
CPUKey Key; CPUKey Key;
/// The Triple fur the current architecture
Triple TgtTriple;
/// The LLVM target corresponding to the disassembler /// The LLVM target corresponding to the disassembler
const llvm::Target *Tgt; const llvm::Target *Tgt;
/// The assembly information for the target architecture /// The assembly information for the target architecture

16
lib/MC/MCDisassembler/EDOperand.cpp
View File

@ -30,8 +30,10 @@ EDOperand::EDOperand(const EDDisassembler &disassembler,
MCOpIndex(mcOpIndex) { MCOpIndex(mcOpIndex) {
unsigned int numMCOperands = 0; unsigned int numMCOperands = 0;
if (Disassembler.Key.Arch == Triple::x86 || Triple::ArchType arch = Disassembler.TgtTriple.getArch();
Disassembler.Key.Arch == Triple::x86_64) {
if (arch == Triple::x86 ||
arch == Triple::x86_64) {
uint8_t operandType = inst.ThisInstInfo->operandTypes[opIndex]; uint8_t operandType = inst.ThisInstInfo->operandTypes[opIndex];
switch (operandType) { switch (operandType) {
@ -54,8 +56,8 @@ EDOperand::EDOperand(const EDDisassembler &disassembler,
break; break;
} }
} }
else if (Disassembler.Key.Arch == Triple::arm || else if (arch == Triple::arm ||
Disassembler.Key.Arch == Triple::thumb) { arch == Triple::thumb) {
uint8_t operandType = inst.ThisInstInfo->operandTypes[opIndex]; uint8_t operandType = inst.ThisInstInfo->operandTypes[opIndex];
switch (operandType) { switch (operandType) {
@ -126,7 +128,9 @@ int EDOperand::evaluate(uint64_t &result,
void *arg) { void *arg) {
uint8_t operandType = Inst.ThisInstInfo->operandTypes[OpIndex]; uint8_t operandType = Inst.ThisInstInfo->operandTypes[OpIndex];
switch (Disassembler.Key.Arch) { Triple::ArchType arch = Disassembler.TgtTriple.getArch();
switch (arch) {
default: default:
return -1; return -1;
case Triple::x86: case Triple::x86:
@ -168,7 +172,7 @@ int EDOperand::evaluate(uint64_t &result,
unsigned segmentReg = Inst.Inst->getOperand(MCOpIndex+4).getReg(); unsigned segmentReg = Inst.Inst->getOperand(MCOpIndex+4).getReg();
if (segmentReg != 0 && Disassembler.Key.Arch == Triple::x86_64) { if (segmentReg != 0 && arch == Triple::x86_64) {
unsigned fsID = Disassembler.registerIDWithName("FS"); unsigned fsID = Disassembler.registerIDWithName("FS");
unsigned gsID = Disassembler.registerIDWithName("GS"); unsigned gsID = Disassembler.registerIDWithName("GS");