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SLPVectorizer: Change the order in which new instructions are added to the function.

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We are not working on a DAG and I ran into a number of problems when I enabled the vectorizations of 'diamond-trees' (trees that share leafs).
* Imroved the numbering API.
* Changed the placement of new instructions to the last root.
* Fixed a bug with external tree users with non-zero lane.
* Fixed a bug in the placement of in-tree users.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182508 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Nadav Rotem
2013-05-22 19:47:32 +00:00
parent 23d1d5eb56
commit 3f75c6cfb5
7 changed files with 236 additions and 58 deletions
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19
test/Transforms/SLPVectorizer/X86/ordering.ll Normal file
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@@ -0,0 +1,19 @@
; RUN: opt < %s -basicaa -slp-vectorizer -dce -S -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.8.0"
define void @updateModelQPFrame(i32 %m_Bits) {
entry:
%0 = load double* undef, align 8
%mul = fmul double undef, %0
%mul2 = fmul double undef, %mul
%mul4 = fmul double %0, %mul2
%mul5 = fmul double undef, 4.000000e+00
%mul7 = fmul double undef, %mul5
%conv = sitofp i32 %m_Bits to double
%mul8 = fmul double %conv, %mul7
%add = fadd double %mul4, %mul8
%cmp11 = fcmp olt double %add, 0.000000e+00
ret void
}