6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2026-04-20 16:17:38 +00:00
Code Issues Projects Releases Wiki Activity

tblgen: Use semantically correct RTTI functions.

Browse Source 
Also, some minor cleanup.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165647 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Sean Silva
2012-10-10 20:24:47 +00:00
parent 6cfc806a6b
commit 3f7b7f8ce0
11 changed files with 57 additions and 78 deletions
Download Patch File Download Diff File Expand all files Collapse all files
utils/TableGen/FixedLenDecoderEmitter.cpp
+2 -2
View File
@@ -1757,8 +1757,8 @@ static bool populateInstruction(const CodeGenInstruction &CGI, unsigned Opc,
// for decoding register classes.
// FIXME: This need to be extended to handle instructions with custom
// decoder methods, and operands with (simple) MIOperandInfo's.
TypedInit *TI = dyn_cast<TypedInit>(NI->first);
RecordRecTy *Type = dyn_cast<RecordRecTy>(TI->getType());
TypedInit *TI = cast<TypedInit>(NI->first);
RecordRecTy *Type = cast<RecordRecTy>(TI->getType());
Record *TypeRecord = Type->getRecord();
bool isReg = false;
if (TypeRecord->isSubClassOf("RegisterOperand"))