6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-08-05 13:26:55 +00:00
Code Issues Projects Releases Wiki Activity

First cut of ARM/MC/ELF PIC relocations.

Browse Source 
Test has fixme, to move to .s -> .o test when AsmParser works better.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121732 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jason W Kim
2010-12-13 23:16:07 +00:00
parent 4711d5cda3
commit 3fa4c1dc95
2 changed files with 125 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files

32
lib/MC/ELFObjectWriter.cpp
View File

@@ -1535,22 +1535,40 @@ unsigned ARMELFObjectWriter::GetRelocType(const MCValue &Target,
unsigned Type = 0;
if (IsPCRel) {
switch (Modifier) {
default: assert(0 && "Unimplemented Modifier");
case MCSymbolRefExpr::VK_None: break;
}
switch ((unsigned)Fixup.getKind()) {
default: assert(0 && "Unimplemented");
case ARM::fixup_arm_branch: Type = ELF::R_ARM_CALL; break;
case FK_Data_4:
switch (Modifier) {
default: llvm_unreachable("Unsupported Modifier");
case MCSymbolRefExpr::VK_None:
Type = ELF::R_ARM_BASE_PREL; break;
case MCSymbolRefExpr::VK_ARM_TLSGD:
assert(0 && "unimplemented"); break;
case MCSymbolRefExpr::VK_ARM_GOTTPOFF:
Type = ELF::R_ARM_TLS_IE32;
} break;
case ARM::fixup_arm_branch:
switch (Modifier) {
case MCSymbolRefExpr::VK_ARM_PLT:
Type = ELF::R_ARM_PLT32; break;
default:
Type = ELF::R_ARM_CALL; break;
} break;
}
} else {
switch ((unsigned)Fixup.getKind()) {
default: llvm_unreachable("invalid fixup kind!");
case FK_Data_4:
switch (Modifier) {
default: llvm_unreachable("Unsupported Modifier");
default: llvm_unreachable("Unsupported Modifier"); break;
case MCSymbolRefExpr::VK_ARM_GOT:
Type = ELF::R_ARM_GOT_BREL; break;
case MCSymbolRefExpr::VK_ARM_TLSGD:
Type = ELF::R_ARM_TLS_GD32; break;
case MCSymbolRefExpr::VK_ARM_GOTTPOFF:
Type = ELF::R_ARM_TLS_IE32;
Type = ELF::R_ARM_TLS_IE32; break;
case MCSymbolRefExpr::VK_ARM_GOTOFF:
Type = ELF::R_ARM_GOTOFF32; break;
} break;
case ARM::fixup_arm_ldst_pcrel_12:
case ARM::fixup_arm_pcrel_10: