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Fix a bug in i32->f64 conversion lowering

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25211 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2006-01-11 07:27:40 +00:00
parent 1b8af84a84
commit 3fbb726141
2 changed files with 4 additions and 4 deletions
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4
lib/Target/Sparc/SparcISelDAGToDAG.cpp
View File

@ -622,9 +622,9 @@ LowerOperation(SDOperand Op, SelectionDAG &DAG) {
return DAG.getNode(ISD::BIT_CONVERT, MVT::i32, Op); return DAG.getNode(ISD::BIT_CONVERT, MVT::i32, Op);
case ISD::SINT_TO_FP: { case ISD::SINT_TO_FP: {
assert(Op.getOperand(0).getValueType() == MVT::i32); assert(Op.getOperand(0).getValueType() == MVT::i32);
Op = DAG.getNode(ISD::BIT_CONVERT, MVT::f32, Op.getOperand(0)); SDOperand Tmp = DAG.getNode(ISD::BIT_CONVERT, MVT::f32, Op.getOperand(0));
// Convert the int value to FP in an FP register. // Convert the int value to FP in an FP register.
return DAG.getNode(V8ISD::ITOF, Op.getValueType(), Op); return DAG.getNode(V8ISD::ITOF, Op.getValueType(), Tmp);
} }
case ISD::BR_CC: { case ISD::BR_CC: {
SDOperand Chain = Op.getOperand(0); SDOperand Chain = Op.getOperand(0);

4
lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
View File

@ -622,9 +622,9 @@ LowerOperation(SDOperand Op, SelectionDAG &DAG) {
return DAG.getNode(ISD::BIT_CONVERT, MVT::i32, Op); return DAG.getNode(ISD::BIT_CONVERT, MVT::i32, Op);
case ISD::SINT_TO_FP: { case ISD::SINT_TO_FP: {
assert(Op.getOperand(0).getValueType() == MVT::i32); assert(Op.getOperand(0).getValueType() == MVT::i32);
Op = DAG.getNode(ISD::BIT_CONVERT, MVT::f32, Op.getOperand(0)); SDOperand Tmp = DAG.getNode(ISD::BIT_CONVERT, MVT::f32, Op.getOperand(0));
// Convert the int value to FP in an FP register. // Convert the int value to FP in an FP register.
return DAG.getNode(V8ISD::ITOF, Op.getValueType(), Op); return DAG.getNode(V8ISD::ITOF, Op.getValueType(), Tmp);
} }
case ISD::BR_CC: { case ISD::BR_CC: {
SDOperand Chain = Op.getOperand(0); SDOperand Chain = Op.getOperand(0);