From 3fc027df4fca0355717515abb4d6e3753e6dee2a Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Sat, 8 Dec 2007 06:59:59 +0000 Subject: [PATCH] implement __builtin_return_addr(0) on ppc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44700 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/PowerPC/PPCISelLowering.cpp | 36 ++++++++++++++++++--- lib/Target/PowerPC/PPCISelLowering.h | 1 + lib/Target/PowerPC/PPCMachineFunctionInfo.h | 22 ++++++++++--- lib/Target/PowerPC/PPCRegisterInfo.cpp | 9 ++++-- lib/Target/PowerPC/README.txt | 1 - test/CodeGen/PowerPC/retaddr.ll | 14 ++++++++ 6 files changed, 72 insertions(+), 11 deletions(-) create mode 100644 test/CodeGen/PowerPC/retaddr.ll diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index cf6ce8a1a04..5dbe801591c 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -3036,8 +3036,8 @@ SDOperand PPCTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) { case ISD::SCALAR_TO_VECTOR: return LowerSCALAR_TO_VECTOR(Op, DAG); case ISD::MUL: return LowerMUL(Op, DAG); - // Frame & Return address. Currently unimplemented - case ISD::RETURNADDR: break; + // Frame & Return address. + case ISD::RETURNADDR: return LowerRETURNADDR(Op, DAG); case ISD::FRAMEADDR: return LowerFRAMEADDR(Op, DAG); } return SDOperand(); @@ -3576,8 +3576,36 @@ bool PPCTargetLowering::isLegalAddressImmediate(llvm::GlobalValue* GV) const { return false; } -SDOperand PPCTargetLowering::LowerFRAMEADDR(SDOperand Op, SelectionDAG &DAG) -{ +SDOperand PPCTargetLowering::LowerRETURNADDR(SDOperand Op, SelectionDAG &DAG) { + // Depths > 0 not supported yet! + if (cast(Op.getOperand(0))->getValue() > 0) + return SDOperand(); + + MachineFunction &MF = DAG.getMachineFunction(); + PPCFunctionInfo *FuncInfo = MF.getInfo(); + int RAIdx = FuncInfo->getReturnAddrSaveIndex(); + if (RAIdx == 0) { + bool isPPC64 = PPCSubTarget.isPPC64(); + int Offset = + PPCFrameInfo::getReturnSaveOffset(isPPC64, PPCSubTarget.isMachoABI()); + + // Set up a frame object for the return address. + RAIdx = MF.getFrameInfo()->CreateFixedObject(isPPC64 ? 8 : 4, Offset); + + // Remember it for next time. + FuncInfo->setReturnAddrSaveIndex(RAIdx); + + // Make sure the function really does not optimize away the store of the RA + // to the stack. + FuncInfo->setLRStoreRequired(); + } + + // Just load the return address off the stack. + SDOperand RetAddrFI = DAG.getFrameIndex(RAIdx, getPointerTy()); + return DAG.getLoad(getPointerTy(), DAG.getEntryNode(), RetAddrFI, NULL, 0); +} + +SDOperand PPCTargetLowering::LowerFRAMEADDR(SDOperand Op, SelectionDAG &DAG) { // Depths > 0 not supported yet! if (cast(Op.getOperand(0))->getValue() > 0) return SDOperand(); diff --git a/lib/Target/PowerPC/PPCISelLowering.h b/lib/Target/PowerPC/PPCISelLowering.h index 2df750d92af..3d3d38f8c82 100644 --- a/lib/Target/PowerPC/PPCISelLowering.h +++ b/lib/Target/PowerPC/PPCISelLowering.h @@ -288,6 +288,7 @@ namespace llvm { /// the offset of the target addressing mode. virtual bool isLegalAddressImmediate(GlobalValue *GV) const; + SDOperand LowerRETURNADDR(SDOperand Op, SelectionDAG &DAG); SDOperand LowerFRAMEADDR(SDOperand Op, SelectionDAG &DAG); }; } diff --git a/lib/Target/PowerPC/PPCMachineFunctionInfo.h b/lib/Target/PowerPC/PPCMachineFunctionInfo.h index bf1fea211b4..f6d70899aa5 100644 --- a/lib/Target/PowerPC/PPCMachineFunctionInfo.h +++ b/lib/Target/PowerPC/PPCMachineFunctionInfo.h @@ -27,18 +27,29 @@ private: /// when using frame pointers (dyna_add, dyna_sub.) int FramePointerSaveIndex; - /// UsesLR - Indicates whether LR is used in the current function. + /// ReturnAddrSaveIndex - Frame index of where the return address is stored. /// + int ReturnAddrSaveIndex; + + /// UsesLR - Indicates whether LR is used in the current function. This is + /// only valid after the initial scan of the function by PEI. bool UsesLR; + /// LRStoreRequired - The bool indicates whether there is some explicit use of + /// the LR/LR8 stack slot that is not obvious from scanning the code. This + /// requires that the code generator produce a store of LR to the stack on + /// entry, even though LR may otherwise apparently not be used. + bool LRStoreRequired; public: - PPCFunctionInfo(MachineFunction& MF) - : FramePointerSaveIndex(0) - {} + PPCFunctionInfo(MachineFunction &MF) + : FramePointerSaveIndex(0), ReturnAddrSaveIndex(0), LRStoreRequired(false){} int getFramePointerSaveIndex() const { return FramePointerSaveIndex; } void setFramePointerSaveIndex(int Idx) { FramePointerSaveIndex = Idx; } + int getReturnAddrSaveIndex() const { return ReturnAddrSaveIndex; } + void setReturnAddrSaveIndex(int idx) { ReturnAddrSaveIndex = idx; } + /// UsesLR - This is set when the prolog/epilog inserter does its initial scan /// of the function, it is true if the LR/LR8 register is ever explicitly /// accessed/clobbered in the machine function (e.g. by calls and movpctolr, @@ -46,6 +57,9 @@ public: void setUsesLR(bool U) { UsesLR = U; } bool usesLR() const { return UsesLR; } + void setLRStoreRequired() { LRStoreRequired = true; } + bool isLRStoreRequired() const { return LRStoreRequired; } + }; } // end of namespace llvm diff --git a/lib/Target/PowerPC/PPCRegisterInfo.cpp b/lib/Target/PowerPC/PPCRegisterInfo.cpp index 679ca2e58f5..c574f7004aa 100644 --- a/lib/Target/PowerPC/PPCRegisterInfo.cpp +++ b/lib/Target/PowerPC/PPCRegisterInfo.cpp @@ -646,9 +646,14 @@ bool PPCRegisterInfo::hasFP(const MachineFunction &MF) const { } /// MustSaveLR - Return true if this function requires that we save the LR -/// register onto the stack in the prolog and restore it in the epilog of the function. +/// register onto the stack in the prolog and restore it in the epilog of the +/// function. static bool MustSaveLR(const MachineFunction &MF) { - return MF.getInfo()->usesLR() || + const PPCFunctionInfo *MFI = MF.getInfo(); + + // We need an save/restore of LR if there is any use/def of LR explicitly, or + // if there is some use of the LR stack slot (e.g. for builtin_return_address. + return MFI->usesLR() || MFI->isLRStoreRequired() || // FIXME: Anything that has a call should clobber the LR register, // isn't this redundant?? MF.getFrameInfo()->hasCalls(); diff --git a/lib/Target/PowerPC/README.txt b/lib/Target/PowerPC/README.txt index 077bc2555d8..74bd15038ac 100644 --- a/lib/Target/PowerPC/README.txt +++ b/lib/Target/PowerPC/README.txt @@ -3,7 +3,6 @@ TODO: * gpr0 allocation * implement do-loop -> bdnz transform -* __builtin_return_address not supported on PPC ===-------------------------------------------------------------------------=== diff --git a/test/CodeGen/PowerPC/retaddr.ll b/test/CodeGen/PowerPC/retaddr.ll new file mode 100644 index 00000000000..6b9a5e3f068 --- /dev/null +++ b/test/CodeGen/PowerPC/retaddr.ll @@ -0,0 +1,14 @@ +; RUN: llvm-as < %s | llc -march=ppc32 | grep mflr +; RUN: llvm-as < %s | llc -march=ppc32 | grep lwz + +target triple = "powerpc-apple-darwin8" + +define void @foo(i8** %X) { +entry: + %tmp = tail call i8* @llvm.returnaddress( i32 0 ) ; [#uses=1] + store i8* %tmp, i8** %X, align 4 + ret void +} + +declare i8* @llvm.returnaddress(i32) +