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mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-04-09 01:38:03 +00:00

Vectors that are known live-in and live-out are clearly already marked in

the vrsave register for the caller.  This allows us to codegen a function as:

_test_rol:
        mfspr r2, 256
        mr r3, r2
        mtspr 256, r3
        vspltisw v2, -12
        vrlw v2, v2, v2
        mtspr 256, r2
        blr

instead of:

_test_rol:
        mfspr r2, 256
        oris r3, r2, 40960
        mtspr 256, r3
        vspltisw v0, -12
        vrlw v2, v0, v0
        mtspr 256, r2
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27772 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2006-04-17 21:22:06 +00:00
parent 939274fcfd
commit 402504b1ba

@ -355,6 +355,22 @@ static void HandleVRSaveUpdate(MachineInstr *MI, const bool *UsedRegs) {
if (UsedRegs[VRRegNo[i]])
UsedRegMask |= 1 << (31-i);
// Live in and live out values already must be in the mask, so don't bother
// marking them.
MachineFunction *MF = MI->getParent()->getParent();
for (MachineFunction::livein_iterator I =
MF->livein_begin(), E = MF->livein_end(); I != E; ++I) {
unsigned RegNo = PPCRegisterInfo::getRegisterNumbering(I->first);
if (VRRegNo[RegNo] == I->first) // If this really is a vector reg.
UsedRegMask &= ~(1 << (31-RegNo)); // Doesn't need to be marked.
}
for (MachineFunction::liveout_iterator I =
MF->liveout_begin(), E = MF->liveout_end(); I != E; ++I) {
unsigned RegNo = PPCRegisterInfo::getRegisterNumbering(*I);
if (VRRegNo[RegNo] == *I) // If this really is a vector reg.
UsedRegMask &= ~(1 << (31-RegNo)); // Doesn't need to be marked.
}
unsigned SrcReg = MI->getOperand(1).getReg();
unsigned DstReg = MI->getOperand(0).getReg();
// If no registers are used, turn this into a copy.