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[X86] Remove the multiply by 8 that goes into the shift constant for X86ISD::VSHLDQ and X86ISD::VSRLDQ. This simplifies the pattern matching in isel and allows these nodes to become the patterns embedded in the instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229431 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -538,10 +538,10 @@ void llvm::UpgradeIntrinsicCall(CallInst *CI, Function *NewFn) {
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if (Shift < 16) {
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SmallVector<Constant*, 32> Idxs;
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for (unsigned l = 0; l < 32; l += 16)
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for (unsigned l = 0; l != 32; l += 16)
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for (unsigned i = 0; i != 16; ++i) {
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unsigned Idx = i + Shift;
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if (Idx >= 16) Idx += 16; // end of lane, switch operand.
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unsigned Idx = 32 + i - Shift;
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if (Idx < 32) Idx -= 16; // end of lane, switch operand.
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Idxs.push_back(Builder.getInt32(Idx + l));
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}
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@@ -561,10 +561,10 @@ void llvm::UpgradeIntrinsicCall(CallInst *CI, Function *NewFn) {
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if (Shift < 16) {
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SmallVector<Constant*, 32> Idxs;
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for (unsigned l = 0; l < 32; l += 16)
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for (unsigned l = 0; l != 32; l += 16)
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for (unsigned i = 0; i != 16; ++i) {
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unsigned Idx = 32 + i - Shift;
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if (Idx < 32) Idx -= 16; // end of lane, switch operand.
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unsigned Idx = i + Shift;
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if (Idx >= 16) Idx += 16; // end of lane, switch operand.
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Idxs.push_back(Builder.getInt32(Idx + l));
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}
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