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Revert r166049
- In general, it's unsafe for this transformation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166135 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -5308,52 +5308,6 @@ SDValue DAGCombiner::visitTRUNCATE(SDNode *N) {
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if (Reduced.getNode())
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return Reduced;
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}
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// fold (trunc (fptoXi x)) -> (smaller fptoXi x)
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if ((N0.getOpcode() == ISD::FP_TO_UINT ||
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N0.getOpcode() == ISD::FP_TO_SINT) && !LegalTypes)
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return DAG.getNode(N0.getOpcode(), N->getDebugLoc(), VT, N0.getOperand(0));
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// fold (trunc (concat ... x ...)) -> (concat ..., (trunc x), ...)),
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// where ... are all 'undef'.
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if (N0.getOpcode() == ISD::CONCAT_VECTORS && !LegalTypes) {
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SmallVector<EVT, 8> VTs;
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SDValue V;
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unsigned Idx = 0;
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unsigned NumDefs = 0;
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for (unsigned i = 0, e = N0.getNumOperands(); i != e; ++i) {
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SDValue X = N0.getOperand(i);
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if (X.getOpcode() != ISD::UNDEF) {
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V = X;
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Idx = i;
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NumDefs++;
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}
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// Stop if more than one members are non-undef.
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if (NumDefs > 1)
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break;
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VTs.push_back(EVT::getVectorVT(*DAG.getContext(),
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VT.getVectorElementType(),
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X.getValueType().getVectorNumElements()));
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}
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if (NumDefs == 0)
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return DAG.getUNDEF(VT);
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if (NumDefs == 1) {
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assert(V.getNode() && "The single defined operand is empty!");
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SmallVector<SDValue, 8> Opnds;
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for (unsigned i = 0, e = VTs.size(); i != e; ++i) {
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if (i != Idx) {
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Opnds.push_back(DAG.getUNDEF(VTs[i]));
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continue;
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}
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SDValue NV = DAG.getNode(ISD::TRUNCATE, V.getDebugLoc(), VTs[i], V);
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AddToWorkList(NV.getNode());
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Opnds.push_back(NV);
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}
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return DAG.getNode(ISD::CONCAT_VECTORS, N->getDebugLoc(), VT,
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&Opnds[0], Opnds.size());
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}
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}
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// Simplify the operands using demanded-bits information.
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if (!VT.isVector() &&
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@ -1,18 +0,0 @@
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=corei7 | FileCheck %s
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define <4 x i8> @bar(<4 x float> %in) nounwind readnone alwaysinline {
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%1 = fptoui <4 x float> %in to <4 x i8>
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ret <4 x i8> %1
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; CHECK: bar
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; CHECK: cvttps2dq
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}
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define <4 x i8> @foo(<4 x float> %in) nounwind readnone alwaysinline {
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%1 = fptoui <4 x float> %in to <4 x i32>
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%2 = trunc <4 x i32> %1 to <4 x i16>
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%3 = shufflevector <4 x i16> %2, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
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%4 = trunc <8 x i16> %3 to <8 x i8>
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%5 = shufflevector <8 x i8> %4, <8 x i8> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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ret <4 x i8> %5
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; CHECK: foo
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; CHECK: cvttps2dq
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}
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