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Rename.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34011 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2007-02-07 21:24:09 +00:00
parent 5ebd10e5ac
commit 403e4a4725
1 changed files with 7 additions and 6 deletions
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13
lib/Target/ARM/ARMRegisterInfo.cpp
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@ -371,11 +371,12 @@ static void emitLoadConstPool(MachineBasicBlock &MBB,
BuildMI(MBB, MBBI, TII.get(ARM::tLDRpci), DestReg).addConstantPoolIndex(Idx); BuildMI(MBB, MBBI, TII.get(ARM::tLDRpci), DestReg).addConstantPoolIndex(Idx);
} }
/// emitThumbRegPlusConstPool - Emits a series of instructions to materialize /// emitThumbRegPlusImmInReg - Emits a series of instructions to materialize
/// a destreg = basereg + immediate in Thumb code. Load the immediate from a /// a destreg = basereg + immediate in Thumb code. Materialize the immediate
/// in a register using mov / mvn sequences or load the immediate from a
/// constpool entry. /// constpool entry.
static static
void emitThumbRegPlusConstPool(MachineBasicBlock &MBB, void emitThumbRegPlusImmInReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator &MBBI, MachineBasicBlock::iterator &MBBI,
unsigned DestReg, unsigned BaseReg, unsigned DestReg, unsigned BaseReg,
int NumBytes, bool CanChangeCC, int NumBytes, bool CanChangeCC,
@ -471,7 +472,7 @@ void emitThumbRegPlusImmediate(MachineBasicBlock &MBB,
if (NumMIs > Threshold) { if (NumMIs > Threshold) {
// This will expand into too many instructions. Load the immediate from a // This will expand into too many instructions. Load the immediate from a
// constpool entry. // constpool entry.
emitThumbRegPlusConstPool(MBB, MBBI, DestReg, BaseReg, NumBytes, true, TII); emitThumbRegPlusImmInReg(MBB, MBBI, DestReg, BaseReg, NumBytes, true, TII);
return; return;
} }
@ -795,7 +796,7 @@ void ARMRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const{
bool UseRR = false; bool UseRR = false;
if (Opcode == ARM::tRestore) { if (Opcode == ARM::tRestore) {
if (FrameReg == ARM::SP) if (FrameReg == ARM::SP)
emitThumbRegPlusConstPool(MBB, II, TmpReg, FrameReg,Offset,false,TII); emitThumbRegPlusImmInReg(MBB, II, TmpReg, FrameReg,Offset,false,TII);
else { else {
emitLoadConstPool(MBB, II, TmpReg, Offset, TII); emitLoadConstPool(MBB, II, TmpReg, Offset, TII);
UseRR = true; UseRR = true;
@ -828,7 +829,7 @@ void ARMRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const{
BuildMI(MBB, II, TII.get(ARM::tMOVrr), ARM::R12).addReg(ARM::R3); BuildMI(MBB, II, TII.get(ARM::tMOVrr), ARM::R12).addReg(ARM::R3);
if (Opcode == ARM::tSpill) { if (Opcode == ARM::tSpill) {
if (FrameReg == ARM::SP) if (FrameReg == ARM::SP)
emitThumbRegPlusConstPool(MBB, II, TmpReg, FrameReg,Offset,false,TII); emitThumbRegPlusImmInReg(MBB, II, TmpReg, FrameReg,Offset,false,TII);
else { else {
emitLoadConstPool(MBB, II, TmpReg, Offset, TII); emitLoadConstPool(MBB, II, TmpReg, Offset, TII);
UseRR = true; UseRR = true;