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Fix translateX86CC: if SetCCOpcode is SETULE and
LHS is a foldable load, then LHS and RHS are swapped and SetCCOpcode is changed to SETUGT. But the later code is expecting operands to be the wrong way round for SETUGT, but they are not in this case, resulting in an inverted compare. The solution is to move the load normalization before the correction for SETUGT. This bug was tickled by LegalizeTypes which happened to legalize the testcase slightly differently to LegalizeDAG. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58092 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1970,28 +1970,25 @@ static bool translateX86CC(ISD::CondCode SetCCOpcode, bool isFP,
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case ISD::SETUGE: X86CC = X86::COND_AE; break;
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}
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} else {
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// First determine if it requires or is profitable to flip the operands.
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bool Flip = false;
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// First determine if it is required or is profitable to flip the operands.
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// If LHS is a foldable load, but RHS is not, flip the condition.
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if ((ISD::isNON_EXTLoad(LHS.getNode()) && LHS.hasOneUse()) &&
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!(ISD::isNON_EXTLoad(RHS.getNode()) && RHS.hasOneUse())) {
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SetCCOpcode = getSetCCSwappedOperands(SetCCOpcode);
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std::swap(LHS, RHS);
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}
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switch (SetCCOpcode) {
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default: break;
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case ISD::SETOLT:
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case ISD::SETOLE:
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case ISD::SETUGT:
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case ISD::SETUGE:
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Flip = true;
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std::swap(LHS, RHS);
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break;
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}
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// If LHS is a foldable load, but RHS is not, flip the condition.
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if (!Flip &&
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(ISD::isNON_EXTLoad(LHS.getNode()) && LHS.hasOneUse()) &&
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!(ISD::isNON_EXTLoad(RHS.getNode()) && RHS.hasOneUse())) {
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SetCCOpcode = getSetCCSwappedOperands(SetCCOpcode);
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Flip = true;
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}
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if (Flip)
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std::swap(LHS, RHS);
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// On a floating point condition, the flags are set as follows:
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// ZF PF CF op
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// 0 | 0 | 0 | X > Y
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17
test/CodeGen/X86/2008-10-24-FlippedCompare.ll
Normal file
17
test/CodeGen/X86/2008-10-24-FlippedCompare.ll
Normal file
@ -0,0 +1,17 @@
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; RUN: llvm-as < %s | llc -enable-legalize-types -march=x86 -mattr=+sse2 -o - | not grep {ucomiss\[^,\]*esp}
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define void @f(float %wt) {
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entry:
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%0 = fcmp ogt float %wt, 0.000000e+00 ; <i1> [#uses=1]
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%1 = tail call i32 @g(i32 44) ; <i32> [#uses=3]
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%2 = inttoptr i32 %1 to i8* ; <i8*> [#uses=2]
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br i1 %0, label %bb, label %bb1
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bb: ; preds = %entry
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ret void
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bb1: ; preds = %entry
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ret void
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}
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declare i32 @g(i32)
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