Fix translateX86CC: if SetCCOpcode is SETULE and

LHS is a foldable load, then LHS and RHS are swapped
and SetCCOpcode is changed to SETUGT.  But the later
code is expecting operands to be the wrong way round
for SETUGT, but they are not in this case, resulting
in an inverted compare.  The solution is to move the
load normalization before the correction for SETUGT.
This bug was tickled by LegalizeTypes which happened
to legalize the testcase slightly differently to
LegalizeDAG.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58092 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Duncan Sands 2008-10-24 13:03:10 +00:00
parent 389b715e0f
commit 4047f4a0b4
2 changed files with 27 additions and 13 deletions

View File

@ -1970,28 +1970,25 @@ static bool translateX86CC(ISD::CondCode SetCCOpcode, bool isFP,
case ISD::SETUGE: X86CC = X86::COND_AE; break;
}
} else {
// First determine if it requires or is profitable to flip the operands.
bool Flip = false;
// First determine if it is required or is profitable to flip the operands.
// If LHS is a foldable load, but RHS is not, flip the condition.
if ((ISD::isNON_EXTLoad(LHS.getNode()) && LHS.hasOneUse()) &&
!(ISD::isNON_EXTLoad(RHS.getNode()) && RHS.hasOneUse())) {
SetCCOpcode = getSetCCSwappedOperands(SetCCOpcode);
std::swap(LHS, RHS);
}
switch (SetCCOpcode) {
default: break;
case ISD::SETOLT:
case ISD::SETOLE:
case ISD::SETUGT:
case ISD::SETUGE:
Flip = true;
std::swap(LHS, RHS);
break;
}
// If LHS is a foldable load, but RHS is not, flip the condition.
if (!Flip &&
(ISD::isNON_EXTLoad(LHS.getNode()) && LHS.hasOneUse()) &&
!(ISD::isNON_EXTLoad(RHS.getNode()) && RHS.hasOneUse())) {
SetCCOpcode = getSetCCSwappedOperands(SetCCOpcode);
Flip = true;
}
if (Flip)
std::swap(LHS, RHS);
// On a floating point condition, the flags are set as follows:
// ZF PF CF op
// 0 | 0 | 0 | X > Y

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@ -0,0 +1,17 @@
; RUN: llvm-as < %s | llc -enable-legalize-types -march=x86 -mattr=+sse2 -o - | not grep {ucomiss\[^,\]*esp}
define void @f(float %wt) {
entry:
%0 = fcmp ogt float %wt, 0.000000e+00 ; <i1> [#uses=1]
%1 = tail call i32 @g(i32 44) ; <i32> [#uses=3]
%2 = inttoptr i32 %1 to i8* ; <i8*> [#uses=2]
br i1 %0, label %bb, label %bb1
bb: ; preds = %entry
ret void
bb1: ; preds = %entry
ret void
}
declare i32 @g(i32)