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Miscellaneous clean-ups based on Evan's feedback:

Browse Source 
- Cleaned up how the prologue-epilogue inserter loops over the instructions.
- Instead of restarting the processing of an instruction if we remove an
  implicit kill, just update the end iterator and make sure that the iterator
  isn't incremented.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47870 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bill Wendling 2008-03-03 23:57:28 +00:00
parent 220a823f8d
commit 405abffd5e
2 changed files with 80 additions and 66 deletions
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50
lib/CodeGen/MachineInstr.cpp
View File

@ -680,37 +680,40 @@ bool MachineInstr::addRegisterKilled(unsigned IncomingReg,
bool AddIfNotFound) {
// Go through the machine instruction's operands to eliminate any potentially
// illegal conditions. I.e., a super- and sub-register both marked "kill".
Restart:
for (unsigned i = 0, e = getNumOperands(); i < e; ++i) {
for (unsigned i = 0, e = getNumOperands(); i < e;) {
MachineOperand &MO = getOperand(i);
if (MO.isRegister() && MO.isUse()) {
unsigned Reg = MO.getReg();
if (!Reg || IncomingReg == Reg ||
!TargetRegisterInfo::isPhysicalRegister(Reg) ||
!TargetRegisterInfo::isPhysicalRegister(IncomingReg))
!TargetRegisterInfo::isPhysicalRegister(IncomingReg)) {
++i;
continue;
}
if (RegInfo->isSubRegister(IncomingReg, Reg)) {
if (MO.isKill()) {
if (MO.isImplicit()) {
// Remove this implicit use that marks the sub-register "kill". Let
// the super-register take care of this information.
RemoveOperand(i);
goto Restart; // Instruction was modified, redo checking.
} else {
// The super-register is going to take care of this kill
// information.
MO.setIsKill(false);
}
}
} else if (RegInfo->isSuperRegister(IncomingReg, Reg) && MO.isKill()) {
if (RegInfo->isSuperRegister(IncomingReg, Reg) && MO.isKill())
// The kill information is already handled by a super-register. Don't
// add this sub-register as a kill.
return true;
if (RegInfo->isSubRegister(IncomingReg, Reg) && MO.isKill()) {
if (MO.isImplicit()) {
// Remove this implicit use that marks the sub-register
// "kill". Let the super-register take care of this
// information.
RemoveOperand(i);
e = getNumOperands();
continue;
} else {
// The super-register is going to take care of this kill
// information.
MO.setIsKill(false);
}
}
}
++i;
}
// If the register already exists, then make sure it or its super-register is
@ -725,13 +728,14 @@ bool MachineInstr::addRegisterKilled(unsigned IncomingReg,
if (Reg == IncomingReg) {
MO.setIsKill();
return true;
} else if (TargetRegisterInfo::isPhysicalRegister(Reg) &&
TargetRegisterInfo::isPhysicalRegister(IncomingReg) &&
RegInfo->isSuperRegister(IncomingReg, Reg) &&
MO.isKill()) {
}
if (TargetRegisterInfo::isPhysicalRegister(Reg) &&
TargetRegisterInfo::isPhysicalRegister(IncomingReg) &&
RegInfo->isSuperRegister(IncomingReg, Reg) &&
MO.isKill())
// A super-register kill already exists.
return true;
}
}
}

96
lib/CodeGen/PrologEpilogInserter.cpp
View File

@ -517,53 +517,63 @@ void PEI::replaceFrameIndices(MachineFunction &Fn) {
for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) {
MachineInstr *MI = I;
if (I->getOpcode() == FrameSetupOpcode ||
I->getOpcode() == FrameDestroyOpcode) {
// Remember how much SP has been adjustment to create the call frame.
int Size = I->getOperand(0).getImm();
if ((!StackGrowsDown && I->getOpcode() == FrameSetupOpcode) ||
(StackGrowsDown && I->getOpcode() == FrameDestroyOpcode))
Size = -Size;
SPAdj += Size;
MachineBasicBlock::iterator PrevI = prior(I);
TRI.eliminateCallFramePseudoInstr(Fn, *BB, I);
// Visit the instructions created by eliminateCallFramePseudoInstr().
I = next(PrevI);
MI = NULL;
} else if (I->getOpcode() == TargetInstrInfo::DECLARE) {
if (I->getOpcode() == TargetInstrInfo::DECLARE) {
// Ignore it.
++I;
} else {
bool DoIncr = true;
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
if (MI->getOperand(i).isFrameIndex()) {
// Some instructions (e.g. inline asm instructions) can have
// multiple frame indices and/or cause eliminateFrameIndex to insert
// more than one instruction. We need the register scavenger to go
// through all of these instructions so that it can update its
// register information. We keep the iterator at the point before
// insertion so that we can revisit them in full.
bool AtBeginning = (I == BB->begin());
if (!AtBeginning) --I;
// If this instruction has a FrameIndex operand, we need to use that
// target machine register info object to eliminate it.
TRI.eliminateFrameIndex(MI, SPAdj, RS);
// Reset the iterator if we were at the beginning of the BB.
if (AtBeginning) {
I = BB->begin();
DoIncr = false;
}
MI = 0;
break;
}
if (DoIncr) ++I;
continue;
}
if (I->getOpcode() == FrameSetupOpcode ||
I->getOpcode() == FrameDestroyOpcode) {
// Remember how much SP has been adjusted to create the call
// frame.
int Size = I->getOperand(0).getImm();
if ((!StackGrowsDown && I->getOpcode() == FrameSetupOpcode) ||
(StackGrowsDown && I->getOpcode() == FrameDestroyOpcode))
Size = -Size;
SPAdj += Size;
MachineBasicBlock::iterator PrevI = prior(I);
TRI.eliminateCallFramePseudoInstr(Fn, *BB, I);
// Visit the instructions created by eliminateCallFramePseudoInstr().
I = next(PrevI);
continue;
}
bool DoIncr = true;
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
if (MI->getOperand(i).isFrameIndex()) {
// Some instructions (e.g. inline asm instructions) can have
// multiple frame indices and/or cause eliminateFrameIndex
// to insert more than one instruction. We need the register
// scavenger to go through all of these instructions so that
// it can update its register information. We keep the
// iterator at the point before insertion so that we can
// revisit them in full.
bool AtBeginning = (I == BB->begin());
if (!AtBeginning) --I;
// If this instruction has a FrameIndex operand, we need to
// use that target machine register info object to eliminate
// it.
TRI.eliminateFrameIndex(MI, SPAdj, RS);
// Reset the iterator if we were at the beginning of the BB.
if (AtBeginning) {
I = BB->begin();
DoIncr = false;
}
MI = 0;
break;
}
if (DoIncr) ++I;
// Update register states.
if (RS && MI) RS->forward(MI);
}