From 40700fe6836c808789d1fe5cc6bcccce86d5c62b Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Tue, 29 Apr 2008 17:28:22 +0000 Subject: [PATCH] don't eliminate load from volatile value on paths where the load is dead. This fixes the second half of PR2262 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50430 91177308-0d34-0410-b5e6-96231b3b80d8 --- .../Scalar/InstructionCombining.cpp | 9 +++++++ .../2008-04-29-VolatileLoadDontMerge.ll | 25 +++++++++++++++++++ 2 files changed, 34 insertions(+) create mode 100644 test/Transforms/InstCombine/2008-04-29-VolatileLoadDontMerge.ll diff --git a/lib/Transforms/Scalar/InstructionCombining.cpp b/lib/Transforms/Scalar/InstructionCombining.cpp index 86aca073abc..82c67d03d93 100644 --- a/lib/Transforms/Scalar/InstructionCombining.cpp +++ b/lib/Transforms/Scalar/InstructionCombining.cpp @@ -9396,6 +9396,15 @@ Instruction *InstCombiner::FoldPHIArgOpIntoPHI(PHINode &PN) { LI->getParent() != PN.getIncomingBlock(i) || !isSafeToSinkLoad(LI)) return 0; + + // If the PHI is volatile and its block has multiple successors, sinking + // it would remove a load of the volatile value from the path through the + // other successor. + if (isVolatile && + LI->getParent()->getTerminator()->getNumSuccessors() != 1) + return 0; + + } else if (I->getOperand(1) != ConstantOp) { return 0; } diff --git a/test/Transforms/InstCombine/2008-04-29-VolatileLoadDontMerge.ll b/test/Transforms/InstCombine/2008-04-29-VolatileLoadDontMerge.ll new file mode 100644 index 00000000000..e43c22daa42 --- /dev/null +++ b/test/Transforms/InstCombine/2008-04-29-VolatileLoadDontMerge.ll @@ -0,0 +1,25 @@ +; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep {volatile load} | count 2 +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" +target triple = "i386-apple-darwin8" +@g_1 = internal global i32 0 ; [#uses=3] + +define i32 @main() nounwind { +entry: + %tmp93 = icmp slt i32 0, 10 ; [#uses=0] + %tmp34 = volatile load i32* @g_1, align 4 ; [#uses=1] + br label %bb + +bb: ; preds = %bb, %entry + %b.0.reg2mem.0 = phi i32 [ 0, %entry ], [ %tmp6, %bb ] ; [#uses=1] + %tmp3.reg2mem.0 = phi i32 [ %tmp34, %entry ], [ %tmp3, %bb ] ; [#uses=1] + %tmp4 = add i32 %tmp3.reg2mem.0, 5 ; [#uses=1] + volatile store i32 %tmp4, i32* @g_1, align 4 + %tmp6 = add i32 %b.0.reg2mem.0, 1 ; [#uses=2] + %tmp9 = icmp slt i32 %tmp6, 10 ; [#uses=1] + %tmp3 = volatile load i32* @g_1, align 4 ; [#uses=1] + br i1 %tmp9, label %bb, label %bb11 + +bb11: ; preds = %bb + ret i32 0 +} +