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tblgen/Target: Add a isAsmParserOnly bit, and teach the disassembler to honor

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104270 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Daniel Dunbar
2010-05-20 20:20:32 +00:00
parent c6519f916b
commit 4072886a69
2 changed files with 7 additions and 0 deletions
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include/llvm/Target/Target.td
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@@ -221,6 +221,9 @@ class Instruction {
// purposes.
bit isCodeGenOnly = 0;
// Is this instruction a pseudo instruction for use by the assembler parser.
bit isAsmParserOnly = 0;
InstrItinClass Itinerary = NoItinerary;// Execution steps used for scheduling.
string Constraints = ""; // OperandConstraint, e.g. $src = $dst.