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foldMemoryOperand() cannot fold tMOVrr sp into load / store in thumb mode. tLDRspi / tSTRspi cannot target / store high registers.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33958 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2007-02-06 06:13:29 +00:00
parent 7d6f77db28
commit 40984d7449
1 changed files with 19 additions and 13 deletions
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32
lib/Target/ARM/ARMRegisterInfo.cpp
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@ -185,6 +185,19 @@ void ARMRegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
abort();
}
/// isLowRegister - Returns true if the register is low register r0-r7.
///
static bool isLowRegister(unsigned Reg) {
using namespace ARM;
switch (Reg) {
case R0: case R1: case R2: case R3:
case R4: case R5: case R6: case R7:
return true;
default:
return false;
}
}
MachineInstr *ARMRegisterInfo::foldMemoryOperand(MachineInstr *MI,
unsigned OpNum, int FI) const {
unsigned Opc = MI->getOpcode();
@ -206,10 +219,16 @@ MachineInstr *ARMRegisterInfo::foldMemoryOperand(MachineInstr *MI,
case ARM::tMOVrr: {
if (OpNum == 0) { // move -> store
unsigned SrcReg = MI->getOperand(1).getReg();
if (!isLowRegister(SrcReg))
// tSTRspi cannot take a high register operand.
break;
NewMI = BuildMI(TII.get(ARM::tSTRspi)).addReg(SrcReg).addFrameIndex(FI)
.addImm(0);
} else { // move -> load
unsigned DstReg = MI->getOperand(0).getReg();
if (!isLowRegister(DstReg))
// tLDRspi cannot target a high register operand.
break;
NewMI = BuildMI(TII.get(ARM::tLDRspi), DstReg).addFrameIndex(FI)
.addImm(0);
}
@ -316,19 +335,6 @@ void emitARMRegPlusImmediate(MachineBasicBlock &MBB,
}
}
/// isLowRegister - Returns true if the register is low register r0-r7.
///
static bool isLowRegister(unsigned Reg) {
using namespace ARM;
switch (Reg) {
case R0: case R1: case R2: case R3:
case R4: case R5: case R6: case R7:
return true;
default:
return false;
}
}
/// calcNumMI - Returns the number of instructions required to materialize
/// the specific add / sub r, c instruction.
static unsigned calcNumMI(int Opc, int ExtraOpc, unsigned Bytes,