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R600: Modernize test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214108 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1,10 +1,11 @@
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; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=R600-CHECK
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; RUN: llc < %s -march=r600 -mcpu=SI -verify-machineinstrs | FileCheck %s --check-prefix=SI-CHECK
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; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
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; R600-CHECK: @fmul_f32
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; R600-CHECK: MUL_IEEE {{\** *}}{{T[0-9]+\.[XYZW]}}, KC0[2].Z, KC0[2].W
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; SI-CHECK: @fmul_f32
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; SI-CHECK: V_MUL_F32
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; FUNC-LABEL: @fmul_f32
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; R600: MUL_IEEE {{\** *}}{{T[0-9]+\.[XYZW]}}, KC0[2].Z, KC0[2].W
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; SI: V_MUL_F32
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define void @fmul_f32(float addrspace(1)* %out, float %a, float %b) {
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entry:
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%0 = fmul float %a, %b
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@ -16,12 +17,12 @@ declare float @llvm.R600.load.input(i32) readnone
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declare void @llvm.AMDGPU.store.output(float, i32)
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; R600-CHECK: @fmul_v2f32
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; R600-CHECK: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW]}}
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; R600-CHECK: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW]}}
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; SI-CHECK: @fmul_v2f32
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; SI-CHECK: V_MUL_F32
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; SI-CHECK: V_MUL_F32
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; FUNC-LABEL: @fmul_v2f32
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; R600: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW]}}
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; R600: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW]}}
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; SI: V_MUL_F32
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; SI: V_MUL_F32
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define void @fmul_v2f32(<2 x float> addrspace(1)* %out, <2 x float> %a, <2 x float> %b) {
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entry:
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%0 = fmul <2 x float> %a, %b
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@ -29,16 +30,16 @@ entry:
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ret void
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}
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; R600-CHECK: @fmul_v4f32
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; R600-CHECK: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; R600-CHECK: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; R600-CHECK: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; R600-CHECK: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; SI-CHECK: @fmul_v4f32
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; SI-CHECK: V_MUL_F32
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; SI-CHECK: V_MUL_F32
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; SI-CHECK: V_MUL_F32
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; SI-CHECK: V_MUL_F32
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; FUNC-LABEL: @fmul_v4f32
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; R600: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; R600: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; R600: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; R600: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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; SI: V_MUL_F32
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; SI: V_MUL_F32
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; SI: V_MUL_F32
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; SI: V_MUL_F32
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define void @fmul_v4f32(<4 x float> addrspace(1)* %out, <4 x float> addrspace(1)* %in) {
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%b_ptr = getelementptr <4 x float> addrspace(1)* %in, i32 1
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%a = load <4 x float> addrspace(1) * %in
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