mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-27 15:29:51 +00:00
R600: Modernize test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214108 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
35822f7171
commit
40a0707ee7
@ -1,10 +1,11 @@
|
|||||||
; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=R600-CHECK
|
; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
|
||||||
; RUN: llc < %s -march=r600 -mcpu=SI -verify-machineinstrs | FileCheck %s --check-prefix=SI-CHECK
|
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
|
||||||
|
|
||||||
; R600-CHECK: @fmul_f32
|
|
||||||
; R600-CHECK: MUL_IEEE {{\** *}}{{T[0-9]+\.[XYZW]}}, KC0[2].Z, KC0[2].W
|
; FUNC-LABEL: @fmul_f32
|
||||||
; SI-CHECK: @fmul_f32
|
; R600: MUL_IEEE {{\** *}}{{T[0-9]+\.[XYZW]}}, KC0[2].Z, KC0[2].W
|
||||||
; SI-CHECK: V_MUL_F32
|
|
||||||
|
; SI: V_MUL_F32
|
||||||
define void @fmul_f32(float addrspace(1)* %out, float %a, float %b) {
|
define void @fmul_f32(float addrspace(1)* %out, float %a, float %b) {
|
||||||
entry:
|
entry:
|
||||||
%0 = fmul float %a, %b
|
%0 = fmul float %a, %b
|
||||||
@ -16,12 +17,12 @@ declare float @llvm.R600.load.input(i32) readnone
|
|||||||
|
|
||||||
declare void @llvm.AMDGPU.store.output(float, i32)
|
declare void @llvm.AMDGPU.store.output(float, i32)
|
||||||
|
|
||||||
; R600-CHECK: @fmul_v2f32
|
; FUNC-LABEL: @fmul_v2f32
|
||||||
; R600-CHECK: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW]}}
|
; R600: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW]}}
|
||||||
; R600-CHECK: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW]}}
|
; R600: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW]}}
|
||||||
; SI-CHECK: @fmul_v2f32
|
|
||||||
; SI-CHECK: V_MUL_F32
|
; SI: V_MUL_F32
|
||||||
; SI-CHECK: V_MUL_F32
|
; SI: V_MUL_F32
|
||||||
define void @fmul_v2f32(<2 x float> addrspace(1)* %out, <2 x float> %a, <2 x float> %b) {
|
define void @fmul_v2f32(<2 x float> addrspace(1)* %out, <2 x float> %a, <2 x float> %b) {
|
||||||
entry:
|
entry:
|
||||||
%0 = fmul <2 x float> %a, %b
|
%0 = fmul <2 x float> %a, %b
|
||||||
@ -29,16 +30,16 @@ entry:
|
|||||||
ret void
|
ret void
|
||||||
}
|
}
|
||||||
|
|
||||||
; R600-CHECK: @fmul_v4f32
|
; FUNC-LABEL: @fmul_v4f32
|
||||||
; R600-CHECK: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
|
; R600: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
|
||||||
; R600-CHECK: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
|
; R600: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
|
||||||
; R600-CHECK: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
|
; R600: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
|
||||||
; R600-CHECK: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
|
; R600: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
|
||||||
; SI-CHECK: @fmul_v4f32
|
|
||||||
; SI-CHECK: V_MUL_F32
|
; SI: V_MUL_F32
|
||||||
; SI-CHECK: V_MUL_F32
|
; SI: V_MUL_F32
|
||||||
; SI-CHECK: V_MUL_F32
|
; SI: V_MUL_F32
|
||||||
; SI-CHECK: V_MUL_F32
|
; SI: V_MUL_F32
|
||||||
define void @fmul_v4f32(<4 x float> addrspace(1)* %out, <4 x float> addrspace(1)* %in) {
|
define void @fmul_v4f32(<4 x float> addrspace(1)* %out, <4 x float> addrspace(1)* %in) {
|
||||||
%b_ptr = getelementptr <4 x float> addrspace(1)* %in, i32 1
|
%b_ptr = getelementptr <4 x float> addrspace(1)* %in, i32 1
|
||||||
%a = load <4 x float> addrspace(1) * %in
|
%a = load <4 x float> addrspace(1) * %in
|
||||||
|
Loading…
Reference in New Issue
Block a user