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Complete vld2 instruction itineries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116136 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -412,7 +412,7 @@ def CortexA8Itineraries : ProcessorItineraries<
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//
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// VLD1u
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InstrItinData<IIC_VLD1u, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
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InstrStage<1, [A8_NLSPipe]>,
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InstrStage<1, [A8_NLSPipe], 1>,
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InstrStage<1, [A8_LSPipe]>],
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[2, 2, 1]>,
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//
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@ -436,8 +436,39 @@ def CortexA8Itineraries : ProcessorItineraries<
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//
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// VLD2
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InstrItinData<IIC_VLD2, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
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InstrStage<1, [A8_NLSPipe]>,
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InstrStage<1, [A8_LSPipe]>], [2, 2, 1]>,
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InstrStage<1, [A8_NLSPipe], 1>,
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InstrStage<1, [A8_LSPipe]>],
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[2, 2, 1]>,
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//
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// VLD2x2
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InstrItinData<IIC_VLD2, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
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InstrStage<3, [A8_NLSPipe], 1>,
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InstrStage<3, [A8_LSPipe]>],
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[2, 2, 3, 3, 1]>,
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//
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// VLD2ln
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InstrItinData<IIC_VLD2, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
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InstrStage<3, [A8_NLSPipe], 1>,
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InstrStage<3, [A8_LSPipe]>],
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[3, 3, 1, 1, 1, 1]>,
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//
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// VLD2u
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InstrItinData<IIC_VLD2, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
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InstrStage<1, [A8_NLSPipe], 1>,
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InstrStage<1, [A8_LSPipe]>],
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[2, 2, 2, 1, 1, 1]>,
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//
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// VLD2x2u
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InstrItinData<IIC_VLD2, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
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InstrStage<3, [A8_NLSPipe], 1>,
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InstrStage<3, [A8_LSPipe]>],
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[2, 2, 3, 3, 2, 1]>,
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//
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// VLD2lnu
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InstrItinData<IIC_VLD2, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
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InstrStage<3, [A8_NLSPipe], 1>,
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InstrStage<3, [A8_LSPipe]>],
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[3, 3, 2, 1, 1, 1, 1, 1]>,
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//
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// VLD3
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InstrItinData<IIC_VLD3, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
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