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ARM assembler support for register name aliases.

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rdar://10550084

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146170 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach
2011-12-08 19:27:38 +00:00
parent 43d5d4ca1c
commit 40e2855547
1 changed files with 16 additions and 2 deletions
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18
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
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@@ -2148,8 +2148,6 @@ int ARMAsmParser::tryParseRegister() {
const AsmToken &Tok = Parser.getTok(); const AsmToken &Tok = Parser.getTok();
if (Tok.isNot(AsmToken::Identifier)) return -1; if (Tok.isNot(AsmToken::Identifier)) return -1;
// FIXME: Validate register for the current architecture; we have to do
// validation later, so maybe there is no need for this here.
std::string lowerCase = Tok.getString().lower(); std::string lowerCase = Tok.getString().lower();
unsigned RegNum = MatchRegisterName(lowerCase); unsigned RegNum = MatchRegisterName(lowerCase);
if (!RegNum) { if (!RegNum) {
@@ -2158,6 +2156,22 @@ int ARMAsmParser::tryParseRegister() {
.Case("r14", ARM::LR) .Case("r14", ARM::LR)
.Case("r15", ARM::PC) .Case("r15", ARM::PC)
.Case("ip", ARM::R12) .Case("ip", ARM::R12)
// Additional register name aliases for 'gas' compatibility.
.Case("a1", ARM::R0)
.Case("a2", ARM::R1)
.Case("a3", ARM::R2)
.Case("a4", ARM::R3)
.Case("v1", ARM::R4)
.Case("v2", ARM::R5)
.Case("v3", ARM::R6)
.Case("v4", ARM::R7)
.Case("v5", ARM::R8)
.Case("v6", ARM::R9)
.Case("v7", ARM::R10)
.Case("v8", ARM::R11)
.Case("sb", ARM::R9)
.Case("sl", ARM::R10)
.Case("fp", ARM::R11)
.Default(0); .Default(0);
} }
if (!RegNum) return -1; if (!RegNum) return -1;