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- Stop simplifycfg from duplicating "ret" instructions into unconditional

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branches. PR8575, rdar://5134905, rdar://8911460.
- Allow codegen tail duplication to dup small return blocks after register
  allocation is done.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124462 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2011-01-28 02:19:21 +00:00
parent c3a20bab75
commit 40f64cb0de
11 changed files with 78 additions and 82 deletions
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10
test/Transforms/JumpThreading/and-and-cond.ll
View File

@@ -1,14 +1,14 @@
; RUN: opt < %s -jump-threading -mem2reg -instcombine -simplifycfg -S | grep {ret i32 %v1}
; There should be no uncond branches left.
; RUN: opt < %s -jump-threading -mem2reg -instcombine -simplifycfg -S | not grep {br label}
; RUN: opt < %s -jump-threading -mem2reg -instcombine -simplifycfg -S | FileCheck %s
declare i32 @f1()
declare i32 @f2()
declare void @f3()
define i32 @test(i1 %cond, i1 %cond2, i1 %cond3) {
; CHECK: test
br i1 %cond, label %T1, label %F1
; CHECK-NOT: T1:
T1:
%v1 = call i32 @f1()
br label %Merge
@@ -18,6 +18,10 @@ F1:
br label %Merge
Merge:
; CHECK: Merge:
; CHECK: %v1 = call i32 @f1()
; CHECK-NEXT: %D = and i1 %cond2, %cond3
; CHECK-NEXT: br i1 %D
%A = phi i1 [true, %T1], [false, %F1]
%B = phi i32 [%v1, %T1], [%v2, %F1]
%C = and i1 %A, %cond2

9
test/Transforms/JumpThreading/and-cond.ll
View File

@@ -1,14 +1,14 @@
; RUN: opt < %s -jump-threading -mem2reg -instcombine -simplifycfg -S | grep {ret i32 %v1}
; There should be no uncond branches left.
; RUN: opt < %s -jump-threading -mem2reg -instcombine -simplifycfg -S | not grep {br label}
; RUN: opt < %s -jump-threading -mem2reg -instcombine -simplifycfg -S | FileCheck %s
declare i32 @f1()
declare i32 @f2()
declare void @f3()
define i32 @test(i1 %cond, i1 %cond2) {
; CHECK: test
br i1 %cond, label %T1, label %F1
; CHECK-NOT: T1
T1:
%v1 = call i32 @f1()
br label %Merge
@@ -18,6 +18,9 @@ F1:
br label %Merge
Merge:
; CHECK: Merge:
; CHECK: %v1 = call i32 @f1()
; CHECK-NEXT: br i1 %cond2
%A = phi i1 [true, %T1], [false, %F1]
%B = phi i32 [%v1, %T1], [%v2, %F1]
%C = and i1 %A, %cond2

9
test/Transforms/JumpThreading/thread-loads.ll
View File

@@ -1,4 +1,4 @@
; RUN: opt < %s -jump-threading -simplifycfg -S | grep {ret i32 1}
; RUN: opt < %s -jump-threading -S | FileCheck %s
; rdar://6402033
; Test that we can thread through the block with the partially redundant load (%2).
@@ -6,12 +6,16 @@ target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f3
target triple = "i386-apple-darwin7"
define i32 @foo(i32* %P) nounwind {
; CHECK: foo
entry:
%0 = tail call i32 (...)* @f1() nounwind ; <i32> [#uses=1]
%1 = icmp eq i32 %0, 0 ; <i1> [#uses=1]
br i1 %1, label %bb1, label %bb
bb: ; preds = %entry
; CHECK: bb1.thread:
; CHECK: store
; CHECK: br label %bb3
store i32 42, i32* %P, align 4
br label %bb1
@@ -26,6 +30,9 @@ bb2: ; preds = %bb1
ret i32 %res.0
bb3: ; preds = %bb1
; CHECK: bb3:
; CHECK: %res.01 = phi i32 [ 1, %bb1.thread ], [ 0, %bb1 ]
; CHECK: ret i32 %res.01
ret i32 %res.0
}