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Add TargetRegisterInfo::printReg() to pretty-print registers.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121780 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2010-12-14 18:53:39 +00:00
parent 4750020788
commit 414e5023f8
2 changed files with 12 additions and 0 deletions
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4
include/llvm/Target/TargetRegisterInfo.h
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@ -29,6 +29,7 @@ class MachineFunction;
class MachineMove; class MachineMove;
class RegScavenger; class RegScavenger;
template<class T> class SmallVectorImpl; template<class T> class SmallVectorImpl;
class raw_ostream;
/// TargetRegisterDesc - This record contains all of the information known about /// TargetRegisterDesc - This record contains all of the information known about
/// a particular register. The AliasSet field (if not null) contains a pointer /// a particular register. The AliasSet field (if not null) contains a pointer
@ -321,6 +322,9 @@ public:
return Reg >= FirstVirtualRegister; return Reg >= FirstVirtualRegister;
} }
/// printReg - Print a virtual or physical register on OS.
void printReg(unsigned Reg, raw_ostream &OS) const;
/// getMinimalPhysRegClass - Returns the Register Class of a physical /// getMinimalPhysRegClass - Returns the Register Class of a physical
/// register of the given type, picking the most sub register class of /// register of the given type, picking the most sub register class of
/// the right type that contains this physreg. /// the right type that contains this physreg.

8
lib/Target/TargetRegisterInfo.cpp
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@ -17,6 +17,7 @@
#include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/ADT/BitVector.h" #include "llvm/ADT/BitVector.h"
#include "llvm/Support/raw_ostream.h"
using namespace llvm; using namespace llvm;
@ -39,6 +40,13 @@ TargetRegisterInfo::TargetRegisterInfo(const TargetRegisterDesc *D, unsigned NR,
TargetRegisterInfo::~TargetRegisterInfo() {} TargetRegisterInfo::~TargetRegisterInfo() {}
void TargetRegisterInfo::printReg(unsigned Reg, raw_ostream &OS) const {
if (Reg && isVirtualRegister(Reg))
OS << "%reg" << Reg;
else
OS << '%' << getName(Reg);
}
/// getMinimalPhysRegClass - Returns the Register Class of a physical /// getMinimalPhysRegClass - Returns the Register Class of a physical
/// register of the given type, picking the most sub register class of /// register of the given type, picking the most sub register class of
/// the right type that contains this physreg. /// the right type that contains this physreg.