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Add floating-point branches and compares. Compares don't complete

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until the next cycle, and there's no interlock, so they effectively
have a delay slot.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14686 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Brian Gaeke 2004-07-08 09:08:22 +00:00
parent 7e540fe2b6
commit 4185d03dc5
4 changed files with 104 additions and 0 deletions
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20
lib/Target/Sparc/DelaySlotFiller.cpp
View File

@ -68,6 +68,26 @@ static bool hasDelaySlot (unsigned Opcode) {
case V8::CALL:
case V8::JMPLrr:
case V8::RETL:
case V8::FBA:
case V8::FBN:
case V8::FBU:
case V8::FBG:
case V8::FBUG:
case V8::FBL:
case V8::FBUL:
case V8::FBLG:
case V8::FBNE:
case V8::FBE:
case V8::FBUE:
case V8::FBGE:
case V8::FBUGE:
case V8::FBLE:
case V8::FBULE:
case V8::FBO:
case V8::FCMPS:
case V8::FCMPD:
case V8::FCMPES:
case V8::FCMPED:
return true;
default:
return false;

32
lib/Target/Sparc/SparcInstrInfo.td
View File

@ -163,6 +163,31 @@ def BLEU : BranchV8<0b0100, "bleu">;
def BCC : BranchV8<0b1101, "bcc">;
def BCS : BranchV8<0b0101, "bcs">;
// Section B.22 - Branch on Floating-point Condition Codes Instructions, p. 121
// floating-point conditional branch class:
class FPBranchV8<bits<4> cc, string nm> : F2_2<cc, 0b110, nm> {
let isBranch = 1;
let isTerminator = 1;
}
def FBA : FPBranchV8<0b1000, "fba">;
def FBN : FPBranchV8<0b0000, "fbn">;
def FBU : FPBranchV8<0b0111, "fbu">;
def FBG : FPBranchV8<0b0110, "fbg">;
def FBUG : FPBranchV8<0b0101, "fbug">;
def FBL : FPBranchV8<0b0100, "fbl">;
def FBUL : FPBranchV8<0b0011, "fbul">;
def FBLG : FPBranchV8<0b0010, "fblg">;
def FBNE : FPBranchV8<0b0001, "fbne">;
def FBE : FPBranchV8<0b1001, "fbe">;
def FBUE : FPBranchV8<0b1010, "fbue">;
def FBGE : FPBranchV8<0b1011, "fbge">;
def FBUGE: FPBranchV8<0b1100, "fbuge">;
def FBLE : FPBranchV8<0b1101, "fble">;
def FBULE: FPBranchV8<0b1110, "fbule">;
def FBO : FPBranchV8<0b1111, "fbo">;
// Section B.24 - Call and Link Instruction, p. 125
// This is the only Format 1 instruction
def CALL : InstV8 {
@ -207,3 +232,10 @@ def FSMULD : F3_3<2, 0b110100, 0b001101001, "fsmuld">;
def FDIVS : F3_3<2, 0b110100, 0b001001101, "fdivs">;
def FDIVD : F3_3<2, 0b110100, 0b001001110, "fdivd">;
// Floating-point Compare Instructions, p. 148
// Note: the 2nd template arg is different for these guys
def FCMPS : F3_3<2, 0b110101, 0b001010001, "fcmps">;
def FCMPD : F3_3<2, 0b110101, 0b001010010, "fcmpd">;
def FCMPES : F3_3<2, 0b110101, 0b001010101, "fcmpes">;
def FCMPED : F3_3<2, 0b110101, 0b001010110, "fcmped">;

20
lib/Target/SparcV8/DelaySlotFiller.cpp
View File

@ -68,6 +68,26 @@ static bool hasDelaySlot (unsigned Opcode) {
case V8::CALL:
case V8::JMPLrr:
case V8::RETL:
case V8::FBA:
case V8::FBN:
case V8::FBU:
case V8::FBG:
case V8::FBUG:
case V8::FBL:
case V8::FBUL:
case V8::FBLG:
case V8::FBNE:
case V8::FBE:
case V8::FBUE:
case V8::FBGE:
case V8::FBUGE:
case V8::FBLE:
case V8::FBULE:
case V8::FBO:
case V8::FCMPS:
case V8::FCMPD:
case V8::FCMPES:
case V8::FCMPED:
return true;
default:
return false;

32
lib/Target/SparcV8/SparcV8InstrInfo.td
View File

@ -163,6 +163,31 @@ def BLEU : BranchV8<0b0100, "bleu">;
def BCC : BranchV8<0b1101, "bcc">;
def BCS : BranchV8<0b0101, "bcs">;
// Section B.22 - Branch on Floating-point Condition Codes Instructions, p. 121
// floating-point conditional branch class:
class FPBranchV8<bits<4> cc, string nm> : F2_2<cc, 0b110, nm> {
let isBranch = 1;
let isTerminator = 1;
}
def FBA : FPBranchV8<0b1000, "fba">;
def FBN : FPBranchV8<0b0000, "fbn">;
def FBU : FPBranchV8<0b0111, "fbu">;
def FBG : FPBranchV8<0b0110, "fbg">;
def FBUG : FPBranchV8<0b0101, "fbug">;
def FBL : FPBranchV8<0b0100, "fbl">;
def FBUL : FPBranchV8<0b0011, "fbul">;
def FBLG : FPBranchV8<0b0010, "fblg">;
def FBNE : FPBranchV8<0b0001, "fbne">;
def FBE : FPBranchV8<0b1001, "fbe">;
def FBUE : FPBranchV8<0b1010, "fbue">;
def FBGE : FPBranchV8<0b1011, "fbge">;
def FBUGE: FPBranchV8<0b1100, "fbuge">;
def FBLE : FPBranchV8<0b1101, "fble">;
def FBULE: FPBranchV8<0b1110, "fbule">;
def FBO : FPBranchV8<0b1111, "fbo">;
// Section B.24 - Call and Link Instruction, p. 125
// This is the only Format 1 instruction
def CALL : InstV8 {
@ -207,3 +232,10 @@ def FSMULD : F3_3<2, 0b110100, 0b001101001, "fsmuld">;
def FDIVS : F3_3<2, 0b110100, 0b001001101, "fdivs">;
def FDIVD : F3_3<2, 0b110100, 0b001001110, "fdivd">;
// Floating-point Compare Instructions, p. 148
// Note: the 2nd template arg is different for these guys
def FCMPS : F3_3<2, 0b110101, 0b001010001, "fcmps">;
def FCMPD : F3_3<2, 0b110101, 0b001010010, "fcmpd">;
def FCMPES : F3_3<2, 0b110101, 0b001010101, "fcmpes">;
def FCMPED : F3_3<2, 0b110101, 0b001010110, "fcmped">;