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Add MCInstrAnalysis class. This allows the targets to specify own versions of MCInstrDescs functions.
- Add overrides for ARM. - Teach llvm-objdump to use this instead of plain MCInstrDesc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137059 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -17,6 +17,7 @@
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#include "llvm/MC/MCDisassembler.h"
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#include "llvm/MC/MCInst.h"
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#include "llvm/MC/MCInstPrinter.h"
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#include "llvm/MC/MCInstrAnalysis.h"
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#include "llvm/MC/MCInstrDesc.h"
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#include "llvm/MC/MCInstrInfo.h"
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#include "llvm/Support/MemoryObject.h"
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@ -28,7 +29,7 @@ using namespace llvm;
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MCFunction
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MCFunction::createFunctionFromMC(StringRef Name, const MCDisassembler *DisAsm,
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const MemoryObject &Region, uint64_t Start,
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uint64_t End, const MCInstrInfo *InstrInfo,
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uint64_t End, const MCInstrAnalysis *Ana,
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raw_ostream &DebugOut) {
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std::set<uint64_t> Splits;
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Splits.insert(Start);
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@ -40,21 +41,17 @@ MCFunction::createFunctionFromMC(StringRef Name, const MCDisassembler *DisAsm,
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MCInst Inst;
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if (DisAsm->getInstruction(Inst, Size, Region, Index, DebugOut)) {
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const MCInstrDesc &Desc = InstrInfo->get(Inst.getOpcode());
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if (Desc.isBranch()) {
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if (Desc.OpInfo[0].OperandType == MCOI::OPERAND_PCREL) {
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int64_t Imm = Inst.getOperand(0).getImm();
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// FIXME: Distinguish relocations from nop jumps.
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if (Imm != 0) {
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if (Index+Imm+Size >= End) {
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Instructions.push_back(MCDecodedInst(Index, Size, Inst));
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continue; // Skip branches that leave the function.
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}
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Splits.insert(Index+Imm+Size);
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}
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if (Ana->isBranch(Inst)) {
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uint64_t targ = Ana->evaluateBranch(Inst, Index, Size);
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// FIXME: Distinguish relocations from nop jumps.
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if (targ != -1ULL && (targ == Index+Size || targ >= End)) {
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Instructions.push_back(MCDecodedInst(Index, Size, Inst));
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continue; // Skip branches that leave the function.
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}
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if (targ != -1ULL)
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Splits.insert(targ);
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Splits.insert(Index+Size);
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} else if (Desc.isReturn()) {
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} else if (Ana->isReturn(Inst)) {
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Splits.insert(Index+Size);
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}
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@ -90,26 +87,22 @@ MCFunction::createFunctionFromMC(StringRef Name, const MCDisassembler *DisAsm,
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MCBasicBlock &BB = i->second;
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if (BB.getInsts().empty()) continue;
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const MCDecodedInst &Inst = BB.getInsts().back();
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const MCInstrDesc &Desc = InstrInfo->get(Inst.Inst.getOpcode());
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if (Desc.isBranch()) {
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// PCRel branch, we know the destination.
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if (Desc.OpInfo[0].OperandType == MCOI::OPERAND_PCREL) {
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int64_t Imm = Inst.Inst.getOperand(0).getImm();
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if (Imm != 0)
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BB.addSucc(&f.getBlockAtAddress(Inst.Address+Inst.Size+Imm));
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// Conditional branches can also fall through to the next block.
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if (Desc.isConditionalBranch() && llvm::next(i) != e)
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BB.addSucc(&llvm::next(i)->second);
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} else {
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if (Ana->isBranch(Inst.Inst)) {
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uint64_t targ = Ana->evaluateBranch(Inst.Inst, Inst.Address, Inst.Size);
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if (targ == -1ULL) {
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// Indirect branch. Bail and add all blocks of the function as a
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// successor.
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for (MCFunction::iterator i = f.begin(), e = f.end(); i != e; ++i)
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BB.addSucc(&i->second);
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}
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} else if (targ != Inst.Address+Inst.Size)
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BB.addSucc(&f.getBlockAtAddress(targ));
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// Conditional branches can also fall through to the next block.
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if (Ana->isConditionalBranch(Inst.Inst) && llvm::next(i) != e)
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BB.addSucc(&llvm::next(i)->second);
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} else {
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// No branch. Fall through to the next block.
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if (!Desc.isReturn() && llvm::next(i) != e)
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if (!Ana->isReturn(Inst.Inst) && llvm::next(i) != e)
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BB.addSucc(&llvm::next(i)->second);
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}
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}
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