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make printInstruction return void since its result is omitted. Make the
error condition get trapped with an assert. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78449 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -170,7 +170,7 @@ namespace {
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const char *ExtraCode);
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void PrintGlobalVariable(const GlobalVariable* GVar);
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bool printInstruction(const MachineInstr *MI); // autogenerated.
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void printInstruction(const MachineInstr *MI); // autogenerated.
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void printMachineInstruction(const MachineInstr *MI);
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bool runOnMachineFunction(MachineFunction &F);
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bool doInitialization(Module &M);
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@ -46,7 +46,7 @@ namespace {
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virtual const char *getPassName() const {
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return "Alpha Assembly Printer";
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}
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bool printInstruction(const MachineInstr *MI);
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void printInstruction(const MachineInstr *MI);
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void printOp(const MachineOperand &MO, bool IsCallOp = false);
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void printOperand(const MachineInstr *MI, int opNum);
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void printBaseOffsetPair(const MachineInstr *MI, int i, bool brackets=true);
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@ -48,7 +48,7 @@ namespace {
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void printOperand(const MachineInstr *MI, int opNum);
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void printMemoryOperand(const MachineInstr *MI, int opNum);
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bool printInstruction(const MachineInstr *MI); // autogenerated.
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void printInstruction(const MachineInstr *MI); // autogenerated.
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void emitLinkage(const std::string &n, GlobalValue::LinkageTypes l);
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bool runOnMachineFunction(MachineFunction &F);
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bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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@ -67,7 +67,7 @@ namespace {
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/// from the instruction set description. This method returns true if the
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/// machine instruction was sufficiently described to print it, otherwise it
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/// returns false.
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bool printInstruction(const MachineInstr *MI);
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void printInstruction(const MachineInstr *MI);
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void printMachineInstruction(const MachineInstr *MI);
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void printOp(const MachineOperand &MO);
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@ -55,7 +55,7 @@ namespace {
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void printSrcMemOperand(const MachineInstr *MI, int OpNum,
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const char* Modifier = 0);
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void printCCOperand(const MachineInstr *MI, int OpNum);
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bool printInstruction(const MachineInstr *MI); // autogenerated.
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void printInstruction(const MachineInstr *MI); // autogenerated.
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void printMachineInstruction(const MachineInstr * MI);
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void emitFunctionHeader(const MachineFunction &MF);
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@ -79,7 +79,7 @@ namespace {
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void emitFunctionEnd(MachineFunction &MF);
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void emitFrameDirective(MachineFunction &MF);
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bool printInstruction(const MachineInstr *MI); // autogenerated.
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void printInstruction(const MachineInstr *MI); // autogenerated.
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bool runOnMachineFunction(MachineFunction &F);
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bool doInitialization(Module &M);
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};
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@ -45,7 +45,7 @@ namespace llvm {
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bool runOnMachineFunction(MachineFunction &F);
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void printOperand(const MachineInstr *MI, int opNum);
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void printCCOperand(const MachineInstr *MI, int opNum);
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bool printInstruction(const MachineInstr *MI); // definition autogenerated.
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void printInstruction(const MachineInstr *MI); // definition autogenerated.
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bool printMachineInstruction(const MachineInstr *MI);
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void EmitFunctionDecls (Module &M);
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void EmitUndefinedVars (Module &M);
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@ -116,7 +116,7 @@ namespace {
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/// from the instruction set description. This method returns true if the
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/// machine instruction was sufficiently described to print it, otherwise it
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/// returns false.
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bool printInstruction(const MachineInstr *MI);
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void printInstruction(const MachineInstr *MI);
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void printMachineInstruction(const MachineInstr *MI);
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void printOp(const MachineOperand &MO);
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@ -65,7 +65,7 @@ namespace {
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const char *Modifier = 0);
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void printCCOperand(const MachineInstr *MI, int opNum);
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bool printInstruction(const MachineInstr *MI); // autogenerated.
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void printInstruction(const MachineInstr *MI); // autogenerated.
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bool runOnMachineFunction(MachineFunction &F);
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bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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unsigned AsmVariant, const char *ExtraCode);
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@ -63,7 +63,7 @@ namespace {
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O << (int32_t)MI->getOperand(OpNum).getImm();
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}
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bool printInstruction(const MachineInstr *MI); // autogenerated.
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void printInstruction(const MachineInstr *MI); // autogenerated.
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void printMachineInstruction(const MachineInstr * MI);
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void emitFunctionHeader(const MachineFunction &MF);
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@ -61,11 +61,11 @@ class VISIBILITY_HIDDEN X86ATTAsmPrinter : public AsmPrinter {
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/// from the instruction set description. This method returns true if the
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/// machine instruction was sufficiently described to print it, otherwise it
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/// returns false.
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bool printInstruction(const MachineInstr *MI);
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void printInstruction(const MachineInstr *MI);
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// New MCInst printing stuff.
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bool printInstruction(const MCInst *MI);
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void printInstruction(const MCInst *MI);
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void printSymbolOperand(const MachineOperand &MO);
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void printOperand(const MCInst *MI, unsigned OpNo,
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@ -37,7 +37,7 @@ struct VISIBILITY_HIDDEN X86IntelAsmPrinter : public AsmPrinter {
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/// from the instruction set description. This method returns true if the
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/// machine instruction was sufficiently described to print it, otherwise it
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/// returns false.
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bool printInstruction(const MachineInstr *MI);
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void printInstruction(const MachineInstr *MI);
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// This method is used by the tablegen'erated instruction printer.
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void printOperand(const MachineInstr *MI, unsigned OpNo,
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@ -77,7 +77,7 @@ namespace {
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void emitFunctionStart(MachineFunction &MF);
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void emitFunctionEnd(MachineFunction &MF);
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bool printInstruction(const MachineInstr *MI); // autogenerated.
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void printInstruction(const MachineInstr *MI); // autogenerated.
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void printMachineInstruction(const MachineInstr *MI);
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bool runOnMachineFunction(MachineFunction &F);
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bool doInitialization(Module &M);
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@ -451,7 +451,7 @@ FindUniqueOperandCommands(std::vector<std::string> &UniqueOperandCommands,
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// If this is the last operand, emit a return.
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if (Inst->Operands.size() == 1)
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Command += " return true;\n";
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Command += " return;\n";
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// Check to see if we already have 'Command' in UniqueOperandCommands.
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// If not, add it.
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@ -529,7 +529,7 @@ FindUniqueOperandCommands(std::vector<std::string> &UniqueOperandCommands,
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// Don't early-out too soon. Other instructions in this
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// group may have more operands.
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FirstInst->Operands.size() == MaxSize) {
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Command += " return true;\n";
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Command += " return;\n";
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}
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UniqueOperandCommands[CommandIdx] += Command;
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@ -565,7 +565,7 @@ void AsmWriterEmitter::run(raw_ostream &O) {
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"/// from the instruction set description. This method returns true if the\n"
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"/// machine instruction was sufficiently described to print it, otherwise\n"
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"/// it returns false.\n"
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"bool " << Target.getName() << ClassName
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"void " << Target.getName() << ClassName
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<< "::printInstruction(const MachineInstr *MI) {\n";
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std::vector<AsmWriterInst> Instructions;
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@ -640,7 +640,7 @@ void AsmWriterEmitter::run(raw_ostream &O) {
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// For the first operand check, add a default value for instructions with
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// just opcode strings to use.
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if (isFirst) {
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UniqueOperandCommands.push_back(" return true;\n");
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UniqueOperandCommands.push_back(" return;\n");
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isFirst = false;
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}
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@ -733,16 +733,16 @@ void AsmWriterEmitter::run(raw_ostream &O) {
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O << " if (MI->getOpcode() == TargetInstrInfo::INLINEASM) {\n"
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<< " O << \"\\t\";\n"
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<< " printInlineAsm(MI);\n"
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<< " return true;\n"
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<< " return;\n"
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<< " } else if (MI->isLabel()) {\n"
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<< " printLabel(MI);\n"
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<< " return true;\n"
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<< " return;\n"
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<< " } else if (MI->getOpcode() == TargetInstrInfo::DECLARE) {\n"
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<< " printDeclare(MI);\n"
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<< " return true;\n"
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<< " return;\n"
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<< " } else if (MI->getOpcode() == TargetInstrInfo::IMPLICIT_DEF) {\n"
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<< " printImplicitDef(MI);\n"
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<< " return true;\n"
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<< " return;\n"
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<< " }\n\n";
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O << "\n#endif\n";
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@ -751,7 +751,7 @@ void AsmWriterEmitter::run(raw_ostream &O) {
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O << " // Emit the opcode for the instruction.\n"
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<< " unsigned Bits = OpInfo[MI->getOpcode()];\n"
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<< " if (Bits == 0) return false;\n"
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<< " assert(Bits != 0 && \"Cannot print this instruction.\");\n"
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<< " O << AsmStrs+(Bits & " << (1 << AsmStrBits)-1 << ");\n\n";
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// Output the table driven operand information.
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@ -815,9 +815,9 @@ void AsmWriterEmitter::run(raw_ostream &O) {
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EmitInstructions(Instructions, O);
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O << " }\n";
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O << " return true;\n";
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O << " return;\n";
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}
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O << " return true;\n";
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O << " return;\n";
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O << "}\n";
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}
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