make printInstruction return void since its result is omitted. Make the

error condition get trapped with an assert.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78449 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2009-08-08 01:32:19 +00:00
parent 8a1871d10b
commit 41aefdcdd1
14 changed files with 25 additions and 25 deletions

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@ -170,7 +170,7 @@ namespace {
const char *ExtraCode);
void PrintGlobalVariable(const GlobalVariable* GVar);
bool printInstruction(const MachineInstr *MI); // autogenerated.
void printInstruction(const MachineInstr *MI); // autogenerated.
void printMachineInstruction(const MachineInstr *MI);
bool runOnMachineFunction(MachineFunction &F);
bool doInitialization(Module &M);

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@ -46,7 +46,7 @@ namespace {
virtual const char *getPassName() const {
return "Alpha Assembly Printer";
}
bool printInstruction(const MachineInstr *MI);
void printInstruction(const MachineInstr *MI);
void printOp(const MachineOperand &MO, bool IsCallOp = false);
void printOperand(const MachineInstr *MI, int opNum);
void printBaseOffsetPair(const MachineInstr *MI, int i, bool brackets=true);

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@ -48,7 +48,7 @@ namespace {
void printOperand(const MachineInstr *MI, int opNum);
void printMemoryOperand(const MachineInstr *MI, int opNum);
bool printInstruction(const MachineInstr *MI); // autogenerated.
void printInstruction(const MachineInstr *MI); // autogenerated.
void emitLinkage(const std::string &n, GlobalValue::LinkageTypes l);
bool runOnMachineFunction(MachineFunction &F);
bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,

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@ -67,7 +67,7 @@ namespace {
/// from the instruction set description. This method returns true if the
/// machine instruction was sufficiently described to print it, otherwise it
/// returns false.
bool printInstruction(const MachineInstr *MI);
void printInstruction(const MachineInstr *MI);
void printMachineInstruction(const MachineInstr *MI);
void printOp(const MachineOperand &MO);

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@ -55,7 +55,7 @@ namespace {
void printSrcMemOperand(const MachineInstr *MI, int OpNum,
const char* Modifier = 0);
void printCCOperand(const MachineInstr *MI, int OpNum);
bool printInstruction(const MachineInstr *MI); // autogenerated.
void printInstruction(const MachineInstr *MI); // autogenerated.
void printMachineInstruction(const MachineInstr * MI);
void emitFunctionHeader(const MachineFunction &MF);

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@ -79,7 +79,7 @@ namespace {
void emitFunctionEnd(MachineFunction &MF);
void emitFrameDirective(MachineFunction &MF);
bool printInstruction(const MachineInstr *MI); // autogenerated.
void printInstruction(const MachineInstr *MI); // autogenerated.
bool runOnMachineFunction(MachineFunction &F);
bool doInitialization(Module &M);
};

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@ -45,7 +45,7 @@ namespace llvm {
bool runOnMachineFunction(MachineFunction &F);
void printOperand(const MachineInstr *MI, int opNum);
void printCCOperand(const MachineInstr *MI, int opNum);
bool printInstruction(const MachineInstr *MI); // definition autogenerated.
void printInstruction(const MachineInstr *MI); // definition autogenerated.
bool printMachineInstruction(const MachineInstr *MI);
void EmitFunctionDecls (Module &M);
void EmitUndefinedVars (Module &M);

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@ -116,7 +116,7 @@ namespace {
/// from the instruction set description. This method returns true if the
/// machine instruction was sufficiently described to print it, otherwise it
/// returns false.
bool printInstruction(const MachineInstr *MI);
void printInstruction(const MachineInstr *MI);
void printMachineInstruction(const MachineInstr *MI);
void printOp(const MachineOperand &MO);

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@ -65,7 +65,7 @@ namespace {
const char *Modifier = 0);
void printCCOperand(const MachineInstr *MI, int opNum);
bool printInstruction(const MachineInstr *MI); // autogenerated.
void printInstruction(const MachineInstr *MI); // autogenerated.
bool runOnMachineFunction(MachineFunction &F);
bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
unsigned AsmVariant, const char *ExtraCode);

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@ -63,7 +63,7 @@ namespace {
O << (int32_t)MI->getOperand(OpNum).getImm();
}
bool printInstruction(const MachineInstr *MI); // autogenerated.
void printInstruction(const MachineInstr *MI); // autogenerated.
void printMachineInstruction(const MachineInstr * MI);
void emitFunctionHeader(const MachineFunction &MF);

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@ -61,11 +61,11 @@ class VISIBILITY_HIDDEN X86ATTAsmPrinter : public AsmPrinter {
/// from the instruction set description. This method returns true if the
/// machine instruction was sufficiently described to print it, otherwise it
/// returns false.
bool printInstruction(const MachineInstr *MI);
void printInstruction(const MachineInstr *MI);
// New MCInst printing stuff.
bool printInstruction(const MCInst *MI);
void printInstruction(const MCInst *MI);
void printSymbolOperand(const MachineOperand &MO);
void printOperand(const MCInst *MI, unsigned OpNo,

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@ -37,7 +37,7 @@ struct VISIBILITY_HIDDEN X86IntelAsmPrinter : public AsmPrinter {
/// from the instruction set description. This method returns true if the
/// machine instruction was sufficiently described to print it, otherwise it
/// returns false.
bool printInstruction(const MachineInstr *MI);
void printInstruction(const MachineInstr *MI);
// This method is used by the tablegen'erated instruction printer.
void printOperand(const MachineInstr *MI, unsigned OpNo,

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@ -77,7 +77,7 @@ namespace {
void emitFunctionStart(MachineFunction &MF);
void emitFunctionEnd(MachineFunction &MF);
bool printInstruction(const MachineInstr *MI); // autogenerated.
void printInstruction(const MachineInstr *MI); // autogenerated.
void printMachineInstruction(const MachineInstr *MI);
bool runOnMachineFunction(MachineFunction &F);
bool doInitialization(Module &M);

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@ -451,7 +451,7 @@ FindUniqueOperandCommands(std::vector<std::string> &UniqueOperandCommands,
// If this is the last operand, emit a return.
if (Inst->Operands.size() == 1)
Command += " return true;\n";
Command += " return;\n";
// Check to see if we already have 'Command' in UniqueOperandCommands.
// If not, add it.
@ -529,7 +529,7 @@ FindUniqueOperandCommands(std::vector<std::string> &UniqueOperandCommands,
// Don't early-out too soon. Other instructions in this
// group may have more operands.
FirstInst->Operands.size() == MaxSize) {
Command += " return true;\n";
Command += " return;\n";
}
UniqueOperandCommands[CommandIdx] += Command;
@ -565,7 +565,7 @@ void AsmWriterEmitter::run(raw_ostream &O) {
"/// from the instruction set description. This method returns true if the\n"
"/// machine instruction was sufficiently described to print it, otherwise\n"
"/// it returns false.\n"
"bool " << Target.getName() << ClassName
"void " << Target.getName() << ClassName
<< "::printInstruction(const MachineInstr *MI) {\n";
std::vector<AsmWriterInst> Instructions;
@ -640,7 +640,7 @@ void AsmWriterEmitter::run(raw_ostream &O) {
// For the first operand check, add a default value for instructions with
// just opcode strings to use.
if (isFirst) {
UniqueOperandCommands.push_back(" return true;\n");
UniqueOperandCommands.push_back(" return;\n");
isFirst = false;
}
@ -733,16 +733,16 @@ void AsmWriterEmitter::run(raw_ostream &O) {
O << " if (MI->getOpcode() == TargetInstrInfo::INLINEASM) {\n"
<< " O << \"\\t\";\n"
<< " printInlineAsm(MI);\n"
<< " return true;\n"
<< " return;\n"
<< " } else if (MI->isLabel()) {\n"
<< " printLabel(MI);\n"
<< " return true;\n"
<< " return;\n"
<< " } else if (MI->getOpcode() == TargetInstrInfo::DECLARE) {\n"
<< " printDeclare(MI);\n"
<< " return true;\n"
<< " return;\n"
<< " } else if (MI->getOpcode() == TargetInstrInfo::IMPLICIT_DEF) {\n"
<< " printImplicitDef(MI);\n"
<< " return true;\n"
<< " return;\n"
<< " }\n\n";
O << "\n#endif\n";
@ -751,7 +751,7 @@ void AsmWriterEmitter::run(raw_ostream &O) {
O << " // Emit the opcode for the instruction.\n"
<< " unsigned Bits = OpInfo[MI->getOpcode()];\n"
<< " if (Bits == 0) return false;\n"
<< " assert(Bits != 0 && \"Cannot print this instruction.\");\n"
<< " O << AsmStrs+(Bits & " << (1 << AsmStrBits)-1 << ");\n\n";
// Output the table driven operand information.
@ -815,9 +815,9 @@ void AsmWriterEmitter::run(raw_ostream &O) {
EmitInstructions(Instructions, O);
O << " }\n";
O << " return true;\n";
O << " return;\n";
}
O << " return true;\n";
O << " return;\n";
O << "}\n";
}