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Allow X86FastIsel to cope with 64 bit absolute relocations

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This patch is a follow up to r211040 & r211052. Rather than bailing out of fast
isel this patch will generate an alternate instruction (movabsq) instead of the
leaq. While this will always have enough room to handle the 64 bit displacment
it is generally over kill for internal symbols (most displacements will be
within 32 bits) but since we have no way of communicating the code model to the
the assmebler in order to avoid flagging an absolute leal/leaq as illegal when
using a symbolic displacement.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211130 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Louis Gerbarg 2014-06-17 23:22:41 +00:00
parent e8cb2ee1cd
commit 41b33299cf
3 changed files with 17 additions and 15 deletions
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22
lib/Target/X86/X86FastISel.cpp
View File

@ -2813,15 +2813,8 @@ unsigned X86FastISel::TargetMaterializeConstant(const Constant *C) {
return 0;
}
// Materialize addresses with LEA instructions.
// Materialize addresses with LEA/MOV instructions.
if (isa<GlobalValue>(C)) {
// LEA can only handle 32 bit immediates. Currently this happens pretty
// rarely, so rather than deal with it just bail out of fast isel. If any
// architectures endis up needing to use this path a lot then fast isel
// could get the address with a MOV64ri and use that to load the value.
if (TM.getRelocationModel() == Reloc::Static && Subtarget->is64Bit())
return false;
X86AddressMode AM;
if (X86SelectAddress(C, AM)) {
// If the expression is just a basereg, then we're done, otherwise we need
@ -2830,10 +2823,19 @@ unsigned X86FastISel::TargetMaterializeConstant(const Constant *C) {
AM.IndexReg == 0 && AM.Disp == 0 && AM.GV == nullptr)
return AM.Base.Reg;
Opc = TLI.getPointerTy() == MVT::i32 ? X86::LEA32r : X86::LEA64r;
unsigned ResultReg = createResultReg(RC);
addFullAddress(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
if (TM.getRelocationModel() == Reloc::Static &&
TLI.getPointerTy() == MVT::i64) {
// The displacement code be more than 32 bits away so we need to use
// an instruction with a 64 bit immediate
Opc = X86::MOV64ri;
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
TII.get(Opc), ResultReg).addGlobalAddress(cast<GlobalValue>(C));
} else {
Opc = TLI.getPointerTy() == MVT::i32 ? X86::LEA32r : X86::LEA64r;
addFullAddress(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
TII.get(Opc), ResultReg), AM);
}
return ResultReg;
}
return 0;

2
test/CodeGen/X86/x86-64-static-relo-movl.ll
View File

@ -17,7 +17,7 @@ define void @setup() {
done:
ret void
; CHECK: movl $_NO_MATCH, {{.*}}
; CHECK: movabsq $_NO_MATCH, {{.*}}
}
; Function Attrs: nounwind

8
test/DebugInfo/X86/debug-loc-asan.ll
View File

@ -9,11 +9,11 @@
; }
; with "clang++ -S -emit-llvm -fsanitize=address -O0 -g test.cc"
; First, argument variable "y" resides in %rdx:
; CHECK: DEBUG_VALUE: bar:y <- RDX
; First, argument variable "y" resides in %rdi:
; CHECK: DEBUG_VALUE: bar:y <- RDI
; Then its address is stored in a location on a stack:
; CHECK: movq %rdx, [[OFFSET:[0-9]+]](%rsp)
; CHECK: movq %rdi, [[OFFSET:[0-9]+]](%rsp)
; CHECK-NEXT: [[START_LABEL:.Ltmp[0-9]+]]
; CHECK-NEXT: DEBUG_VALUE: bar:y <- [RSP+[[OFFSET]]]
; This location should be valid until the end of the function.
@ -26,7 +26,7 @@
; CHECK-NEXT: .quad .Lset{{[0-9]+}}
; CHECK-NEXT: .Lset{{[0-9]+}} = [[START_LABEL]]-.Lfunc_begin0
; CHECK-NEXT: .quad .Lset{{[0-9]+}}
; CHECK: DW_OP_reg1
; CHECK: DW_OP_reg5
; Then it's addressed via %rsp:
; CHECK: .Lset{{[0-9]+}} = [[START_LABEL]]-.Lfunc_begin0