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Fix insertion point in pcmp expander.

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While I'm there, clean up too many \n even for me.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120411 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher 2010-11-30 08:20:21 +00:00
parent 82be220092
commit 41c902fdbe
1 changed files with 2 additions and 9 deletions
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11
lib/Target/X86/X86ISelLowering.cpp
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@ -9405,15 +9405,12 @@ X86TargetLowering::EmitAtomicMinMaxWithCustomInserter(MachineInstr *mInstr,
MachineBasicBlock * MachineBasicBlock *
X86TargetLowering::EmitPCMP(MachineInstr *MI, MachineBasicBlock *BB, X86TargetLowering::EmitPCMP(MachineInstr *MI, MachineBasicBlock *BB,
unsigned numArgs, bool memArg) const { unsigned numArgs, bool memArg) const {
assert((Subtarget->hasSSE42() || Subtarget->hasAVX()) && assert((Subtarget->hasSSE42() || Subtarget->hasAVX()) &&
"Target must have SSE4.2 or AVX features enabled"); "Target must have SSE4.2 or AVX features enabled");
DebugLoc dl = MI->getDebugLoc(); DebugLoc dl = MI->getDebugLoc();
const TargetInstrInfo *TII = getTargetMachine().getInstrInfo(); const TargetInstrInfo *TII = getTargetMachine().getInstrInfo();
unsigned Opc; unsigned Opc;
if (!Subtarget->hasAVX()) { if (!Subtarget->hasAVX()) {
if (memArg) if (memArg)
Opc = numArgs == 3 ? X86::PCMPISTRM128rm : X86::PCMPESTRM128rm; Opc = numArgs == 3 ? X86::PCMPISTRM128rm : X86::PCMPESTRM128rm;
@ -9426,20 +9423,16 @@ X86TargetLowering::EmitPCMP(MachineInstr *MI, MachineBasicBlock *BB,
Opc = numArgs == 3 ? X86::VPCMPISTRM128rr : X86::VPCMPESTRM128rr; Opc = numArgs == 3 ? X86::VPCMPISTRM128rr : X86::VPCMPESTRM128rr;
} }
MachineInstrBuilder MIB = BuildMI(BB, dl, TII->get(Opc)); MachineInstrBuilder MIB = BuildMI(*BB, MI, dl, TII->get(Opc));
for (unsigned i = 0; i < numArgs; ++i) { for (unsigned i = 0; i < numArgs; ++i) {
MachineOperand &Op = MI->getOperand(i+1); MachineOperand &Op = MI->getOperand(i+1);
if (!(Op.isReg() && Op.isImplicit())) if (!(Op.isReg() && Op.isImplicit()))
MIB.addOperand(Op); MIB.addOperand(Op);
} }
BuildMI(*BB, MI, dl, TII->get(X86::MOVAPSrr), MI->getOperand(0).getReg())
BuildMI(BB, dl, TII->get(X86::MOVAPSrr), MI->getOperand(0).getReg())
.addReg(X86::XMM0); .addReg(X86::XMM0);
MI->eraseFromParent(); MI->eraseFromParent();
return BB; return BB;
} }