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MC X86: Accept ".att_syntax prefix" and diagnose noprefix
Fixes PR18916. I don't think we need to implement support for either hybrid syntax. Nobody should write Intel assembly with '%' prefixes on their registers or AT&T assembly without them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215031 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2528,14 +2528,25 @@ bool X86AsmParser::ParseDirective(AsmToken DirectiveID) {
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else if (IDVal.startswith(".code"))
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return ParseDirectiveCode(IDVal, DirectiveID.getLoc());
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else if (IDVal.startswith(".att_syntax")) {
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if (getLexer().isNot(AsmToken::EndOfStatement)) {
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if (Parser.getTok().getString() == "prefix")
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Parser.Lex();
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else if (Parser.getTok().getString() == "noprefix")
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return Error(DirectiveID.getLoc(), "'.att_syntax noprefix' is not "
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"supported: registers must have a "
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"'%' prefix in .att_syntax");
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}
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getParser().setAssemblerDialect(0);
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return false;
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} else if (IDVal.startswith(".intel_syntax")) {
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getParser().setAssemblerDialect(1);
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if (getLexer().isNot(AsmToken::EndOfStatement)) {
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// FIXME: Handle noprefix
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if (Parser.getTok().getString() == "noprefix")
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Parser.Lex();
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else if (Parser.getTok().getString() == "prefix")
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return Error(DirectiveID.getLoc(), "'.intel_syntax prefix' is not "
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"supported: registers must not have "
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"a '%' prefix in .intel_syntax");
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}
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return false;
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}
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@ -7,3 +7,11 @@ _test:
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.att_syntax
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// CHECK: movl $257, -4(%rsp)
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movl $257, -4(%rsp)
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_test2:
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.intel_syntax noprefix
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mov DWORD PTR [RSP - 4], 255
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// CHECK: movl $255, -4(%rsp)
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.att_syntax prefix
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movl $255, -4(%rsp)
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// CHECK: movl $255, -4(%rsp)
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