From 41e53fd39b453be9266e832d7534ae0edeaf334c Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Sat, 11 Nov 2006 01:00:15 +0000 Subject: [PATCH] disallow preinc of a frameindex. This is not profitable and causes 2-addr pass to explode. This fixes a bunch of llc-beta failures on ppc last night. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31661 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index e3d8c80bceb..46f14b98df1 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -2750,14 +2750,20 @@ bool DAGCombiner::CombineToPreIndexedLoadStore(SDNode *N) { if (!TLI.getPreIndexedAddressParts(N, BasePtr, Offset, AM, DAG)) return false; - // Try turning it into a pre-indexed load / store except when - // 1) If N is a store and the ptr is either the same as or is a + // Try turning it into a pre-indexed load / store except when: + // 1) The base is a frame index. + // 2) If N is a store and the ptr is either the same as or is a // predecessor of the value being stored. - // 2) Another use of base ptr is a predecessor of N. If ptr is folded + // 3) Another use of base ptr is a predecessor of N. If ptr is folded // that would create a cycle. - // 3) All uses are load / store ops that use it as base ptr. + // 4) All uses are load / store ops that use it as base ptr. - // Checking #1. + // Check #1. Preinc'ing a frame index would require copying the stack pointer + // (plus the implicit offset) to a register to preinc anyway. + if (isa(BasePtr)) + return false; + + // Check #2. if (!isLoad) { SDOperand Val = cast(N)->getValue(); if (Val == Ptr || Ptr.Val->isPredecessor(Val.Val))