Missing piece of the ARM frame index post-scavenging conditionalization

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84798 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2009-10-21 23:40:56 +00:00
parent ff233b858a
commit 41fff8c19a
3 changed files with 16 additions and 0 deletions

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@ -944,6 +944,7 @@ bool ARMBaseRegisterInfo::
requiresRegisterScavenging(const MachineFunction &MF) const {
return true;
}
bool ARMBaseRegisterInfo::
requiresFrameIndexScavenging(const MachineFunction &MF) const {
return ScavengeFrameIndexVals;

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@ -77,6 +77,18 @@ Thumb1RegisterInfo::getPhysicalRegisterRegClass(unsigned Reg, EVT VT) const {
return TargetRegisterInfo::getPhysicalRegisterRegClass(Reg, VT);
}
bool
Thumb1RegisterInfo::requiresRegisterScavenging(const MachineFunction &MF) const {
return true;
}
bool
Thumb1RegisterInfo::requiresFrameIndexScavenging(const MachineFunction &MF)
const {
return true;
}
bool Thumb1RegisterInfo::hasReservedCallFrame(MachineFunction &MF) const {
const MachineFrameInfo *FFI = MF.getFrameInfo();
unsigned CFSize = FFI->getMaxCallFrameSize();

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@ -40,6 +40,9 @@ public:
const TargetRegisterClass *
getPhysicalRegisterRegClass(unsigned Reg, EVT VT = MVT::Other) const;
bool requiresRegisterScavenging(const MachineFunction &MF) const;
bool requiresFrameIndexScavenging(const MachineFunction &MF) const;
bool hasReservedCallFrame(MachineFunction &MF) const;
void eliminateCallFramePseudoInstr(MachineFunction &MF,