Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change since they are equivalent.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155188 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper
2012-04-20 07:30:17 +00:00
parent c909950c38
commit 420761a0f1
31 changed files with 292 additions and 296 deletions

View File

@ -40,9 +40,9 @@ unsigned MipsFunctionInfo::getGlobalBaseReg() {
if (FixGlobalBaseReg) // $gp is the global base register.
return GlobalBaseReg = ST.isABI_N64() ? Mips::GP_64 : Mips::GP;
const TargetRegisterClass *RC;
RC = ST.isABI_N64() ?
Mips::CPU64RegsRegisterClass : Mips::CPURegsRegisterClass;
const TargetRegisterClass *RC = ST.isABI_N64() ?
(const TargetRegisterClass*)&Mips::CPU64RegsRegClass :
(const TargetRegisterClass*)&Mips::CPURegsRegClass;
return GlobalBaseReg = MF.getRegInfo().createVirtualRegister(RC);
}