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https://github.com/c64scene-ar/llvm-6502.git
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Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change since they are equivalent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155188 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -40,9 +40,9 @@ unsigned MipsFunctionInfo::getGlobalBaseReg() {
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if (FixGlobalBaseReg) // $gp is the global base register.
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return GlobalBaseReg = ST.isABI_N64() ? Mips::GP_64 : Mips::GP;
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const TargetRegisterClass *RC;
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RC = ST.isABI_N64() ?
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Mips::CPU64RegsRegisterClass : Mips::CPURegsRegisterClass;
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const TargetRegisterClass *RC = ST.isABI_N64() ?
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(const TargetRegisterClass*)&Mips::CPU64RegsRegClass :
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(const TargetRegisterClass*)&Mips::CPURegsRegClass;
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return GlobalBaseReg = MF.getRegInfo().createVirtualRegister(RC);
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}
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