diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index 9526ae1f2a7..1ef1d3e9d0e 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -121,6 +121,12 @@ PPCTargetLowering::PPCTargetLowering(TargetMachine &TM) setOperationAction(ISD::SRA, MVT::i64, Custom); } + if (TM.getSubtarget().hasAltivec()) { + // FIXME: AltiVec supports a wide variety of packed types. For now, we're + // bringing up support with just v4f32. + addRegisterClass(MVT::v4f32, PPC::VRRCRegisterClass); + } + setSetCCResultContents(ZeroOrOneSetCCResult); computeRegisterProperties();