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Tidy up. No functional change intended.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166630 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chad Rosier 2012-10-24 22:13:37 +00:00
parent 2c6d71388f
commit 4284e1795d
1 changed files with 15 additions and 14 deletions
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29
lib/Target/X86/AsmParser/X86AsmParser.cpp
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@ -18,6 +18,7 @@
#include "llvm/MC/MCParser/MCAsmLexer.h" #include "llvm/MC/MCParser/MCAsmLexer.h"
#include "llvm/MC/MCParser/MCAsmParser.h" #include "llvm/MC/MCParser/MCAsmParser.h"
#include "llvm/MC/MCParser/MCParsedAsmOperand.h" #include "llvm/MC/MCParser/MCParsedAsmOperand.h"
#include "llvm/ADT/APFloat.h"
#include "llvm/ADT/SmallString.h" #include "llvm/ADT/SmallString.h"
#include "llvm/ADT/SmallVector.h" #include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringSwitch.h" #include "llvm/ADT/StringSwitch.h"
@ -472,9 +473,8 @@ struct X86Operand : public MCParsedAsmOperand {
} }
/// Create an absolute memory operand. /// Create an absolute memory operand.
static X86Operand *CreateMem(const MCExpr *Disp, SMLoc StartLoc, static X86Operand *CreateMem(const MCExpr *Disp, SMLoc StartLoc, SMLoc EndLoc,
SMLoc EndLoc, unsigned Size = 0, unsigned Size = 0, bool NeedSizeDir = false){
bool NeedSizeDir = false){
X86Operand *Res = new X86Operand(Memory, StartLoc, EndLoc); X86Operand *Res = new X86Operand(Memory, StartLoc, EndLoc);
Res->Mem.SegReg = 0; Res->Mem.SegReg = 0;
Res->Mem.Disp = Disp; Res->Mem.Disp = Disp;
@ -662,9 +662,10 @@ static unsigned getIntelMemOperandSize(StringRef OpStr) {
X86Operand *X86AsmParser::ParseIntelBracExpression(unsigned SegReg, X86Operand *X86AsmParser::ParseIntelBracExpression(unsigned SegReg,
unsigned Size) { unsigned Size) {
unsigned BaseReg = 0, IndexReg = 0, Scale = 1; unsigned BaseReg = 0, IndexReg = 0, Scale = 1;
SMLoc Start = Parser.getTok().getLoc(), End; const AsmToken &Tok = Parser.getTok();
SMLoc Start = Tok.getLoc(), End;
const MCExpr *Disp = MCConstantExpr::Create(0, getParser().getContext()); const MCExpr *Disp = MCConstantExpr::Create(0, getContext());
// Parse [ BaseReg + Scale*IndexReg + Disp ] or [ symbol ] // Parse [ BaseReg + Scale*IndexReg + Disp ] or [ symbol ]
// Eat '[' // Eat '['
@ -683,9 +684,9 @@ X86Operand *X86AsmParser::ParseIntelBracExpression(unsigned SegReg,
return X86Operand::CreateMem(Disp, Start, End, Size); return X86Operand::CreateMem(Disp, Start, End, Size);
} }
} else if (getLexer().is(AsmToken::Integer)) { } else if (getLexer().is(AsmToken::Integer)) {
int64_t Val = Parser.getTok().getIntVal(); int64_t Val = Tok.getIntVal();
Parser.Lex(); Parser.Lex();
SMLoc Loc = Parser.getTok().getLoc(); SMLoc Loc = Tok.getLoc();
if (getLexer().is(AsmToken::RBrac)) { if (getLexer().is(AsmToken::RBrac)) {
// Handle '[' number ']' // Handle '[' number ']'
Parser.Lex(); Parser.Lex();
@ -697,7 +698,7 @@ X86Operand *X86AsmParser::ParseIntelBracExpression(unsigned SegReg,
} else if (getLexer().is(AsmToken::Star)) { } else if (getLexer().is(AsmToken::Star)) {
// Handle '[' Scale*IndexReg ']' // Handle '[' Scale*IndexReg ']'
Parser.Lex(); Parser.Lex();
SMLoc IdxRegLoc = Parser.getTok().getLoc(); SMLoc IdxRegLoc = Tok.getLoc();
if (ParseRegister(IndexReg, IdxRegLoc, End)) if (ParseRegister(IndexReg, IdxRegLoc, End))
return ErrorOperand(IdxRegLoc, "Expected register"); return ErrorOperand(IdxRegLoc, "Expected register");
Scale = Val; Scale = Val;
@ -708,13 +709,13 @@ X86Operand *X86AsmParser::ParseIntelBracExpression(unsigned SegReg,
if (getLexer().is(AsmToken::Plus) || getLexer().is(AsmToken::Minus)) { if (getLexer().is(AsmToken::Plus) || getLexer().is(AsmToken::Minus)) {
bool isPlus = getLexer().is(AsmToken::Plus); bool isPlus = getLexer().is(AsmToken::Plus);
Parser.Lex(); Parser.Lex();
SMLoc PlusLoc = Parser.getTok().getLoc(); SMLoc PlusLoc = Tok.getLoc();
if (getLexer().is(AsmToken::Integer)) { if (getLexer().is(AsmToken::Integer)) {
int64_t Val = Parser.getTok().getIntVal(); int64_t Val = Tok.getIntVal();
Parser.Lex(); Parser.Lex();
if (getLexer().is(AsmToken::Star)) { if (getLexer().is(AsmToken::Star)) {
Parser.Lex(); Parser.Lex();
SMLoc IdxRegLoc = Parser.getTok().getLoc(); SMLoc IdxRegLoc = Tok.getLoc();
if (ParseRegister(IndexReg, IdxRegLoc, End)) if (ParseRegister(IndexReg, IdxRegLoc, End))
return ErrorOperand(IdxRegLoc, "Expected register"); return ErrorOperand(IdxRegLoc, "Expected register");
Scale = Val; Scale = Val;
@ -725,7 +726,7 @@ X86Operand *X86AsmParser::ParseIntelBracExpression(unsigned SegReg,
return ErrorOperand(PlusLoc, "unexpected token after +"); return ErrorOperand(PlusLoc, "unexpected token after +");
} else if (getLexer().is(AsmToken::Identifier)) { } else if (getLexer().is(AsmToken::Identifier)) {
// This could be an index register or a displacement expression. // This could be an index register or a displacement expression.
End = Parser.getTok().getLoc(); End = Tok.getLoc();
if (!IndexReg) if (!IndexReg)
ParseRegister(IndexReg, Start, End); ParseRegister(IndexReg, Start, End);
else if (getParser().ParseExpression(Disp, End)) return 0; else if (getParser().ParseExpression(Disp, End)) return 0;
@ -735,11 +736,11 @@ X86Operand *X86AsmParser::ParseIntelBracExpression(unsigned SegReg,
if (getLexer().isNot(AsmToken::RBrac)) if (getLexer().isNot(AsmToken::RBrac))
if (getParser().ParseExpression(Disp, End)) return 0; if (getParser().ParseExpression(Disp, End)) return 0;
End = Parser.getTok().getLoc(); End = Tok.getLoc();
if (getLexer().isNot(AsmToken::RBrac)) if (getLexer().isNot(AsmToken::RBrac))
return ErrorOperand(End, "expected ']' token!"); return ErrorOperand(End, "expected ']' token!");
Parser.Lex(); Parser.Lex();
End = Parser.getTok().getLoc(); End = Tok.getLoc();
// handle [-42] // handle [-42]
if (!BaseReg && !IndexReg) if (!BaseReg && !IndexReg)