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Keep track of the start of MBB's in a separate map from instructions. This
is faster and is needed for future improvements. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30383 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -38,6 +38,10 @@ namespace llvm {
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const TargetInstrInfo* tii_;
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LiveVariables* lv_;
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/// MBB2IdxMap - The index of the first instruction in the specified basic
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/// block.
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std::vector<unsigned> MBB2IdxMap;
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typedef std::map<MachineInstr*, unsigned> Mi2IndexMap;
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Mi2IndexMap mi2iMap_;
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@ -113,6 +117,17 @@ namespace llvm {
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return I->second;
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}
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/// getMBBStartIdx - Return the base index of the first instruction in the
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/// specified MachineBasicBlock.
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unsigned getMBBStartIdx(MachineBasicBlock *MBB) const {
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return getMBBStartIdx(MBB->getNumber());
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}
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unsigned getMBBStartIdx(unsigned MBBNo) const {
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assert(MBBNo < MBB2IdxMap.size() && "Invalid MBB number!");
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return MBB2IdxMap[MBBNo];
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}
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/// getInstructionIndex - returns the base index of instr
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unsigned getInstructionIndex(MachineInstr* instr) const {
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Mi2IndexMap::const_iterator it = mi2iMap_.find(instr);
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@ -128,7 +143,7 @@ namespace llvm {
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"index does not correspond to an instruction");
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return i2miMap_[index];
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}
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std::vector<LiveInterval*> addIntervalsForSpills(const LiveInterval& i,
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VirtRegMap& vrm,
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int slot);
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@ -155,7 +170,7 @@ namespace llvm {
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}
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}
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/// computeIntervals - compute live intervals
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/// computeIntervals - Compute live intervals.
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void computeIntervals();
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/// joinIntervals - join compatible live intervals
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@ -57,7 +57,7 @@ namespace {
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static cl::opt<bool>
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EnableJoining("join-liveintervals",
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cl::desc("Join compatible live intervals"),
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cl::desc("Coallesce copies (default=true)"),
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cl::init(true));
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}
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@ -120,17 +120,24 @@ bool LiveIntervals::runOnMachineFunction(MachineFunction &fn) {
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"copyRetToReg didn't insert anything!");
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}
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// number MachineInstrs
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unsigned miIndex = 0;
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for (MachineFunction::iterator mbb = mf_->begin(), mbbEnd = mf_->end();
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mbb != mbbEnd; ++mbb)
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for (MachineBasicBlock::iterator mi = mbb->begin(), miEnd = mbb->end();
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mi != miEnd; ++mi) {
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bool inserted = mi2iMap_.insert(std::make_pair(mi, miIndex)).second;
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// Number MachineInstrs and MachineBasicBlocks.
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// Initialize MBB indexes to a sentinal.
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MBB2IdxMap.resize(mf_->getNumBlockIDs(), ~0U);
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unsigned MIIndex = 0;
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for (MachineFunction::iterator MBB = mf_->begin(), E = mf_->end();
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MBB != E; ++MBB) {
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// Set the MBB2IdxMap entry for this MBB.
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MBB2IdxMap[MBB->getNumber()] = MIIndex;
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for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end();
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I != E; ++I) {
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bool inserted = mi2iMap_.insert(std::make_pair(I, MIIndex)).second;
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assert(inserted && "multiple MachineInstr -> index mappings");
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i2miMap_.push_back(mi);
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miIndex += InstrSlots::NUM;
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i2miMap_.push_back(I);
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MIIndex += InstrSlots::NUM;
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}
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}
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// Note intervals due to live-in values.
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if (fn.livein_begin() != fn.livein_end()) {
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@ -155,14 +162,15 @@ bool LiveIntervals::runOnMachineFunction(MachineFunction &fn) {
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std::cerr << "\n";
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});
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// join intervals if requested
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// Join (coallesce) intervals if requested.
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if (EnableJoining) joinIntervals();
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numIntervalsAfter += getNumIntervals();
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// perform a final pass over the instructions and compute spill
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// weights, coalesce virtual registers and remove identity moves.
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const LoopInfo& loopInfo = getAnalysis<LoopInfo>();
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const LoopInfo &loopInfo = getAnalysis<LoopInfo>();
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for (MachineFunction::iterator mbbi = mf_->begin(), mbbe = mf_->end();
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mbbi != mbbe; ++mbbi) {
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@ -420,10 +428,10 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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// live interval.
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for (unsigned i = 0, e = vi.AliveBlocks.size(); i != e; ++i) {
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if (vi.AliveBlocks[i]) {
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MachineBasicBlock* mbb = mf_->getBlockNumbered(i);
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if (!mbb->empty()) {
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LiveRange LR(getInstructionIndex(&mbb->front()),
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getInstructionIndex(&mbb->back()) + InstrSlots::NUM,
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MachineBasicBlock *MBB = mf_->getBlockNumbered(i);
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if (!MBB->empty()) {
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LiveRange LR(getMBBStartIdx(i),
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getInstructionIndex(&MBB->back()) + InstrSlots::NUM,
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ValNum);
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interval.addRange(LR);
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DEBUG(std::cerr << " +" << LR);
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@ -435,7 +443,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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// block to the 'use' slot of the killing instruction.
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for (unsigned i = 0, e = vi.Kills.size(); i != e; ++i) {
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MachineInstr *Kill = vi.Kills[i];
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LiveRange LR(getInstructionIndex(Kill->getParent()->begin()),
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LiveRange LR(getMBBStartIdx(Kill->getParent()),
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getUseIndex(getInstructionIndex(Kill))+1,
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ValNum);
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interval.addRange(LR);
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@ -498,7 +506,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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// Remove the old range that we now know has an incorrect number.
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MachineInstr *Killer = vi.Kills[0];
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unsigned Start = getInstructionIndex(Killer->getParent()->begin());
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unsigned Start = getMBBStartIdx(Killer->getParent());
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unsigned End = getUseIndex(getInstructionIndex(Killer))+1;
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DEBUG(std::cerr << "Removing [" << Start << "," << End << "] from: ";
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interval.print(std::cerr, mri_); std::cerr << "\n");
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@ -613,35 +621,34 @@ void LiveIntervals::computeIntervals() {
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// Track the index of the current machine instr.
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unsigned MIIndex = 0;
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for (MachineFunction::iterator I = mf_->begin(), E = mf_->end();
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I != E; ++I) {
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MachineBasicBlock* mbb = I;
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DEBUG(std::cerr << ((Value*)mbb->getBasicBlock())->getName() << ":\n");
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for (MachineFunction::iterator MBBI = mf_->begin(), E = mf_->end();
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MBBI != E; ++MBBI) {
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MachineBasicBlock *MBB = MBBI;
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DEBUG(std::cerr << ((Value*)MBB->getBasicBlock())->getName() << ":\n");
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MachineBasicBlock::iterator mi = mbb->begin(), miEnd = mbb->end();
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MachineBasicBlock::iterator MI = MBB->begin(), miEnd = MBB->end();
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if (IgnoreFirstInstr) {
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++mi;
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++MI;
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IgnoreFirstInstr = false;
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MIIndex += InstrSlots::NUM;
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}
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for (; mi != miEnd; ++mi) {
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const TargetInstrDescriptor& tid =
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tm_->getInstrInfo()->get(mi->getOpcode());
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DEBUG(std::cerr << MIIndex << "\t" << *mi);
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// handle implicit defs
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if (tid.ImplicitDefs) {
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for (const unsigned* id = tid.ImplicitDefs; *id; ++id)
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handleRegisterDef(mbb, mi, MIIndex, *id);
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for (; MI != miEnd; ++MI) {
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const TargetInstrDescriptor &TID = tii_->get(MI->getOpcode());
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DEBUG(std::cerr << MIIndex << "\t" << *MI);
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// Handle implicit defs.
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if (TID.ImplicitDefs) {
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for (const unsigned *ImpDef = TID.ImplicitDefs; *ImpDef; ++ImpDef)
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handleRegisterDef(MBB, MI, MIIndex, *ImpDef);
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}
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// handle explicit defs
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for (int i = mi->getNumOperands() - 1; i >= 0; --i) {
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MachineOperand& mop = mi->getOperand(i);
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// Handle explicit defs.
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for (int i = MI->getNumOperands() - 1; i >= 0; --i) {
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MachineOperand &MO = MI->getOperand(i);
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// handle register defs - build intervals
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if (mop.isRegister() && mop.getReg() && mop.isDef())
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handleRegisterDef(mbb, mi, MIIndex, mop.getReg());
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if (MO.isRegister() && MO.getReg() && MO.isDef())
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handleRegisterDef(MBB, MI, MIIndex, MO.getReg());
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}
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MIIndex += InstrSlots::NUM;
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