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When the target-independent DAGCombiner inferred a higher alignment for a load,

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it would replace the load with one with the higher alignment.  However, it did
not place the new load in the worklist, which prevented later DAG combines in
the same phase (for example, target-specific combines) from ever seeing it.

This patch corrects that oversight, and updates some tests whose output changed
due to slightly different DAGCombine outputs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174343 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Owen Anderson 2013-02-05 06:25:30 +00:00
parent a2de37c897
commit 429f7ef0c1
3 changed files with 10 additions and 6 deletions
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7
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
View File

@ -7199,12 +7199,15 @@ SDValue DAGCombiner::visitLOAD(SDNode *N) {
// Try to infer better alignment information than the load already has.
if (OptLevel != CodeGenOpt::None && LD->isUnindexed()) {
if (unsigned Align = DAG.InferPtrAlignment(Ptr)) {
if (Align > LD->getAlignment())
return DAG.getExtLoad(LD->getExtensionType(), N->getDebugLoc(),
if (Align > LD->getAlignment()) {
SDValue NewLoad =
DAG.getExtLoad(LD->getExtensionType(), N->getDebugLoc(),
LD->getValueType(0),
Chain, Ptr, LD->getPointerInfo(),
LD->getMemoryVT(),
LD->isVolatile(), LD->isNonTemporal(), Align);
return CombineTo(N, NewLoad, SDValue(NewLoad.getNode(), 1), true);
}
}
}

3
test/CodeGen/AArch64/func-argpassing.ll
View File

@ -178,7 +178,8 @@ define void @check_i128_stackalign(i32 %val0, i32 %val1, i32 %val2, i32 %val3,
; Nothing local on stack in current codegen, so first stack is 16 away
; CHECK: ldr {{x[0-9]+}}, [sp, #16]
; Important point is that we address sp+24 for second dword
; CHECK: ldr {{x[0-9]+}}, [sp, #24]
; CHECK: add [[REG:x[0-9]+]], sp, #16
; CHECK: ldr {{x[0-9]+}}, {{\[}}[[REG]], #8]
ret void
}

6
test/CodeGen/X86/divide-by-constant.ll
View File

@ -56,9 +56,9 @@ entry:
%div = sdiv i16 %x, 10
ret i16 %div
; CHECK: test6:
; CHECK: imull $26215, %eax, %eax
; CHECK: shrl $31, %ecx
; CHECK: sarl $18, %eax
; CHECK: imull $26215, %eax, %ecx
; CHECK: sarl $18, %ecx
; CHECK: shrl $15, %eax
}
define i32 @test7(i32 %x) nounwind {