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mop up: "Don’t duplicate function or class name at the beginning of the comment."

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218218 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Sanjay Patel 2014-09-21 14:48:16 +00:00
parent 974e872b03
commit 42dac6565f
3 changed files with 45 additions and 59 deletions
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61
lib/CodeGen/AggressiveAntiDepBreaker.h
View File

@ -32,88 +32,83 @@
namespace llvm {
class RegisterClassInfo;
/// Class AggressiveAntiDepState
/// Contains all the state necessary for anti-dep breaking.
class AggressiveAntiDepState {
public:
/// RegisterReference - Information about a register reference
/// within a liverange
/// Information about a register reference within a liverange
typedef struct {
/// Operand - The registers operand
/// The registers operand
MachineOperand *Operand;
/// RC - The register class
/// The register class
const TargetRegisterClass *RC;
} RegisterReference;
private:
/// NumTargetRegs - Number of non-virtual target registers
/// (i.e. TRI->getNumRegs()).
/// Number of non-virtual target registers (i.e. TRI->getNumRegs()).
const unsigned NumTargetRegs;
/// GroupNodes - Implements a disjoint-union data structure to
/// Implements a disjoint-union data structure to
/// form register groups. A node is represented by an index into
/// the vector. A node can "point to" itself to indicate that it
/// is the parent of a group, or point to another node to indicate
/// that it is a member of the same group as that node.
std::vector<unsigned> GroupNodes;
/// GroupNodeIndices - For each register, the index of the GroupNode
/// For each register, the index of the GroupNode
/// currently representing the group that the register belongs to.
/// Register 0 is always represented by the 0 group, a group
/// composed of registers that are not eligible for anti-aliasing.
std::vector<unsigned> GroupNodeIndices;
/// RegRefs - Map registers to all their references within a live range.
/// Map registers to all their references within a live range.
std::multimap<unsigned, RegisterReference> RegRefs;
/// KillIndices - The index of the most recent kill (proceding bottom-up),
/// The index of the most recent kill (proceding bottom-up),
/// or ~0u if the register is not live.
std::vector<unsigned> KillIndices;
/// DefIndices - The index of the most recent complete def (proceding bottom
/// The index of the most recent complete def (proceding bottom
/// up), or ~0u if the register is live.
std::vector<unsigned> DefIndices;
public:
AggressiveAntiDepState(const unsigned TargetRegs, MachineBasicBlock *BB);
/// GetKillIndices - Return the kill indices.
/// Return the kill indices.
std::vector<unsigned> &GetKillIndices() { return KillIndices; }
/// GetDefIndices - Return the define indices.
/// Return the define indices.
std::vector<unsigned> &GetDefIndices() { return DefIndices; }
/// GetRegRefs - Return the RegRefs map.
/// Return the RegRefs map.
std::multimap<unsigned, RegisterReference>& GetRegRefs() { return RegRefs; }
// GetGroup - Get the group for a register. The returned value is
// Get the group for a register. The returned value is
// the index of the GroupNode representing the group.
unsigned GetGroup(unsigned Reg);
// GetGroupRegs - Return a vector of the registers belonging to a
// group. If RegRefs is non-NULL then only included referenced registers.
// Return a vector of the registers belonging to a group.
// If RegRefs is non-NULL then only included referenced registers.
void GetGroupRegs(
unsigned Group,
std::vector<unsigned> &Regs,
std::multimap<unsigned,
AggressiveAntiDepState::RegisterReference> *RegRefs);
// UnionGroups - Union Reg1's and Reg2's groups to form a new
// group. Return the index of the GroupNode representing the
// group.
// Union Reg1's and Reg2's groups to form a new group.
// Return the index of the GroupNode representing the group.
unsigned UnionGroups(unsigned Reg1, unsigned Reg2);
// LeaveGroup - Remove a register from its current group and place
// Remove a register from its current group and place
// it alone in its own group. Return the index of the GroupNode
// representing the registers new group.
unsigned LeaveGroup(unsigned Reg);
/// IsLive - Return true if Reg is live
/// Return true if Reg is live.
bool IsLive(unsigned Reg);
};
/// Class AggressiveAntiDepBreaker
class AggressiveAntiDepBreaker : public AntiDepBreaker {
MachineFunction& MF;
MachineRegisterInfo &MRI;
@ -121,12 +116,11 @@ class RegisterClassInfo;
const TargetRegisterInfo *TRI;
const RegisterClassInfo &RegClassInfo;
/// CriticalPathSet - The set of registers that should only be
/// The set of registers that should only be
/// renamed if they are on the critical path.
BitVector CriticalPathSet;
/// State - The state used to identify and rename anti-dependence
/// registers.
/// The state used to identify and rename anti-dependence registers.
AggressiveAntiDepState *State;
public:
@ -135,11 +129,10 @@ class RegisterClassInfo;
TargetSubtargetInfo::RegClassVector& CriticalPathRCs);
~AggressiveAntiDepBreaker();
/// Start - Initialize anti-dep breaking for a new basic block.
/// Initialize anti-dep breaking for a new basic block.
void StartBlock(MachineBasicBlock *BB) override;
/// BreakAntiDependencies - Identifiy anti-dependencies along the critical
/// path
/// Identifiy anti-dependencies along the critical path
/// of the ScheduleDAG and break them by renaming registers.
///
unsigned BreakAntiDependencies(const std::vector<SUnit>& SUnits,
@ -148,24 +141,24 @@ class RegisterClassInfo;
unsigned InsertPosIndex,
DbgValueVector &DbgValues) override;
/// Observe - Update liveness information to account for the current
/// Update liveness information to account for the current
/// instruction, which will not be scheduled.
///
void Observe(MachineInstr *MI, unsigned Count,
unsigned InsertPosIndex) override;
/// Finish - Finish anti-dep breaking for a basic block.
/// Finish anti-dep breaking for a basic block.
void FinishBlock() override;
private:
/// Keep track of a position in the allocation order for each regclass.
typedef std::map<const TargetRegisterClass *, unsigned> RenameOrderType;
/// IsImplicitDefUse - Return true if MO represents a register
/// Return true if MO represents a register
/// that is both implicitly used and defined in MI
bool IsImplicitDefUse(MachineInstr *MI, MachineOperand& MO);
/// GetPassthruRegs - If MI implicitly def/uses a register, then
/// If MI implicitly def/uses a register, then
/// return that register and all subregisters.
void GetPassthruRegs(MachineInstr *MI, std::set<unsigned>& PassthruRegs);

20
lib/CodeGen/AntiDepBreaker.h
View File

@ -25,9 +25,8 @@
namespace llvm {
/// AntiDepBreaker - This class works into conjunction with the
/// post-RA scheduler to rename registers to break register
/// anti-dependencies.
/// This class works in conjunction with the post-RA scheduler to rename
/// registers to break register anti-dependencies (WAR hazards).
class AntiDepBreaker {
public:
typedef std::vector<std::pair<MachineInstr *, MachineInstr *> >
@ -35,29 +34,26 @@ public:
virtual ~AntiDepBreaker();
/// Start - Initialize anti-dep breaking for a new basic block.
/// Initialize anti-dep breaking for a new basic block.
virtual void StartBlock(MachineBasicBlock *BB) =0;
/// BreakAntiDependencies - Identifiy anti-dependencies within a
/// basic-block region and break them by renaming registers. Return
/// the number of anti-dependencies broken.
///
/// Identifiy anti-dependencies within a basic-block region and break them by
/// renaming registers. Return the number of anti-dependencies broken.
virtual unsigned BreakAntiDependencies(const std::vector<SUnit>& SUnits,
MachineBasicBlock::iterator Begin,
MachineBasicBlock::iterator End,
unsigned InsertPosIndex,
DbgValueVector &DbgValues) = 0;
/// Observe - Update liveness information to account for the current
/// Update liveness information to account for the current
/// instruction, which will not be scheduled.
///
virtual void Observe(MachineInstr *MI, unsigned Count,
unsigned InsertPosIndex) =0;
/// Finish - Finish anti-dep breaking for a basic block.
/// Finish anti-dep breaking for a basic block.
virtual void FinishBlock() =0;
/// UpdateDbgValue - Update DBG_VALUE if dependency breaker is updating
/// Update DBG_VALUE if dependency breaker is updating
/// other machine instruction to use NewReg.
void UpdateDbgValue(MachineInstr *MI, unsigned OldReg, unsigned NewReg) {
assert (MI->isDebugValue() && "MI is not DBG_VALUE!");

23
lib/CodeGen/CriticalAntiDepBreaker.h
View File

@ -38,32 +38,32 @@ class TargetRegisterInfo;
const TargetRegisterInfo *TRI;
const RegisterClassInfo &RegClassInfo;
/// AllocatableSet - The set of allocatable registers.
/// The set of allocatable registers.
/// We'll be ignoring anti-dependencies on non-allocatable registers,
/// because they may not be safe to break.
const BitVector AllocatableSet;
/// Classes - For live regs that are only used in one register class in a
/// For live regs that are only used in one register class in a
/// live range, the register class. If the register is not live, the
/// corresponding value is null. If the register is live but used in
/// multiple register classes, the corresponding value is -1 casted to a
/// pointer.
std::vector<const TargetRegisterClass*> Classes;
/// RegRefs - Map registers to all their references within a live range.
/// Map registers to all their references within a live range.
std::multimap<unsigned, MachineOperand *> RegRefs;
typedef std::multimap<unsigned, MachineOperand *>::const_iterator
RegRefIter;
/// KillIndices - The index of the most recent kill (proceeding bottom-up),
/// The index of the most recent kill (proceeding bottom-up),
/// or ~0u if the register is not live.
std::vector<unsigned> KillIndices;
/// DefIndices - The index of the most recent complete def (proceeding
/// The index of the most recent complete def (proceeding
/// bottom up), or ~0u if the register is live.
std::vector<unsigned> DefIndices;
/// KeepRegs - A set of registers which are live and cannot be changed to
/// A set of registers which are live and cannot be changed to
/// break anti-dependencies.
BitVector KeepRegs;
@ -71,26 +71,23 @@ class TargetRegisterInfo;
CriticalAntiDepBreaker(MachineFunction& MFi, const RegisterClassInfo&);
~CriticalAntiDepBreaker();
/// Start - Initialize anti-dep breaking for a new basic block.
/// Initialize anti-dep breaking for a new basic block.
void StartBlock(MachineBasicBlock *BB) override;
/// BreakAntiDependencies - Identifiy anti-dependencies along the critical
/// path
/// Identifiy anti-dependencies along the critical path
/// of the ScheduleDAG and break them by renaming registers.
///
unsigned BreakAntiDependencies(const std::vector<SUnit>& SUnits,
MachineBasicBlock::iterator Begin,
MachineBasicBlock::iterator End,
unsigned InsertPosIndex,
DbgValueVector &DbgValues) override;
/// Observe - Update liveness information to account for the current
/// Update liveness information to account for the current
/// instruction, which will not be scheduled.
///
void Observe(MachineInstr *MI, unsigned Count,
unsigned InsertPosIndex) override;
/// Finish - Finish anti-dep breaking for a basic block.
/// Finish anti-dep breaking for a basic block.
void FinishBlock() override;
private: