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https://github.com/c64scene-ar/llvm-6502.git
synced 2025-07-16 11:24:39 +00:00
Reinstate this optimization to fold icmp of xor when possible. Don't try to
turn icmp eq a+x, b+x into icmp eq a, b if a+x or b+x has other uses. This may have been increasing register pressure leading to the bzip2 slowdown. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63487 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -6095,18 +6095,40 @@ Instruction *InstCombiner::visitICmpInst(ICmpInst &I) {
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if (BinaryOperator *Op0I = dyn_cast<BinaryOperator>(Op0)) {
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if (BinaryOperator *Op1I = dyn_cast<BinaryOperator>(Op1)) {
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if (Op0I->getOpcode() == Op1I->getOpcode() && Op0I->hasOneUse() &&
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Op1I->hasOneUse() && Op0I->getOperand(1) == Op1I->getOperand(1) &&
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I.isEquality()) {
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Op1I->hasOneUse() && Op0I->getOperand(1) == Op1I->getOperand(1)) {
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switch (Op0I->getOpcode()) {
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default: break;
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case Instruction::Add:
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case Instruction::Sub:
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case Instruction::Xor:
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// a+x icmp eq/ne b+x --> a icmp b
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return new ICmpInst(I.getPredicate(), Op0I->getOperand(0),
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Op1I->getOperand(0));
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if (I.isEquality()) {
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// a+x icmp eq/ne b+x --> a icmp b
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return new ICmpInst(I.getPredicate(), Op0I->getOperand(0),
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Op1I->getOperand(0));
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} else {
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// icmp u/s (a ^ signbit), (b ^ signbit) --> icmp s/u a, b
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if (ConstantInt *CI = dyn_cast<ConstantInt>(Op0I->getOperand(1))) {
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if (CI->getValue().isSignBit()) {
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ICmpInst::Predicate Pred = I.isSignedPredicate()
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? I.getUnsignedPredicate()
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: I.getSignedPredicate();
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return new ICmpInst(Pred, Op0I->getOperand(0),
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Op1I->getOperand(0));
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} else if ((~CI->getValue()).isSignBit()) {
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ICmpInst::Predicate Pred = I.isSignedPredicate()
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? I.getUnsignedPredicate()
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: I.getSignedPredicate();
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Pred = I.getSwappedPredicate(Pred);
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return new ICmpInst(Pred, Op0I->getOperand(0),
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Op1I->getOperand(0));
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}
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}
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}
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break;
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case Instruction::Mul:
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if (!I.isEquality())
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break;
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if (ConstantInt *CI = dyn_cast<ConstantInt>(Op0I->getOperand(1))) {
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// a * Cst icmp eq/ne b * Cst --> a & Mask icmp b & Mask
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// Mask = -1 >> count-trailing-zeros(Cst).
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@@ -6425,6 +6447,29 @@ Instruction *InstCombiner::visitICmpInstWithInstAndIntCst(ICmpInst &ICI,
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else
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return new ICmpInst(ICmpInst::ICMP_SLT, CompareVal, AddOne(RHS));
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}
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if (LHSI->hasOneUse()) {
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// (icmp u/s (xor A SignBit), C) -> (icmp s/u A, (xor C SignBit))
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if (!ICI.isEquality() && XorCST->getValue().isSignBit()) {
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const APInt &SignBit = XorCST->getValue();
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ICmpInst::Predicate Pred = ICI.isSignedPredicate()
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? ICI.getUnsignedPredicate()
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: ICI.getSignedPredicate();
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return new ICmpInst(Pred, LHSI->getOperand(0),
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ConstantInt::get(RHSV ^ SignBit));
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}
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// (icmp u/s (xor A ~SignBit), C) -> (icmp s/u (xor C ~SignBit), A)
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if (!ICI.isEquality() && (~XorCST->getValue()).isSignBit()) {
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const APInt &NotSignBit = XorCST->getValue();
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ICmpInst::Predicate Pred = ICI.isSignedPredicate()
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? ICI.getUnsignedPredicate()
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: ICI.getSignedPredicate();
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Pred = ICI.getSwappedPredicate(Pred);
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return new ICmpInst(Pred, LHSI->getOperand(0),
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ConstantInt::get(RHSV ^ NotSignBit));
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}
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}
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}
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break;
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case Instruction::And: // (icmp pred (and X, AndCST), RHS)
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