From 43875e63f323ee01a08e0f2709213f2f84ff66c7 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Mon, 19 Dec 2005 02:51:12 +0000 Subject: [PATCH] don't emit 'add %o6, 0, %o6' instructions git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24857 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Sparc/SparcRegisterInfo.cpp | 11 ++++++----- lib/Target/SparcV8/SparcV8RegisterInfo.cpp | 11 ++++++----- 2 files changed, 12 insertions(+), 10 deletions(-) diff --git a/lib/Target/Sparc/SparcRegisterInfo.cpp b/lib/Target/Sparc/SparcRegisterInfo.cpp index f781ee92a5c..7b258567304 100644 --- a/lib/Target/Sparc/SparcRegisterInfo.cpp +++ b/lib/Target/Sparc/SparcRegisterInfo.cpp @@ -77,11 +77,12 @@ void SparcV8RegisterInfo:: eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const { MachineInstr &MI = *I; - int size = MI.getOperand (0).getImmedValue (); - if (MI.getOpcode () == V8::ADJCALLSTACKDOWN) - size = -size; - BuildMI (MBB, I, V8::ADDri, 2, V8::O6).addReg (V8::O6).addSImm (size); - MBB.erase (I); + int Size = MI.getOperand(0).getImmedValue(); + if (MI.getOpcode() == V8::ADJCALLSTACKDOWN) + Size = -Size; + if (Size) + BuildMI(MBB, I, V8::ADDri, 2, V8::O6).addReg(V8::O6).addSImm(Size); + MBB.erase(I); } void diff --git a/lib/Target/SparcV8/SparcV8RegisterInfo.cpp b/lib/Target/SparcV8/SparcV8RegisterInfo.cpp index f781ee92a5c..7b258567304 100644 --- a/lib/Target/SparcV8/SparcV8RegisterInfo.cpp +++ b/lib/Target/SparcV8/SparcV8RegisterInfo.cpp @@ -77,11 +77,12 @@ void SparcV8RegisterInfo:: eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const { MachineInstr &MI = *I; - int size = MI.getOperand (0).getImmedValue (); - if (MI.getOpcode () == V8::ADJCALLSTACKDOWN) - size = -size; - BuildMI (MBB, I, V8::ADDri, 2, V8::O6).addReg (V8::O6).addSImm (size); - MBB.erase (I); + int Size = MI.getOperand(0).getImmedValue(); + if (MI.getOpcode() == V8::ADJCALLSTACKDOWN) + Size = -Size; + if (Size) + BuildMI(MBB, I, V8::ADDri, 2, V8::O6).addReg(V8::O6).addSImm(Size); + MBB.erase(I); } void