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Use the appropriate unsigned int type for the offset.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186015 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Adrian Prantl 2013-07-10 16:56:52 +00:00
parent 4759f26c31
commit 43ae5e85f8
1 changed files with 3 additions and 2 deletions
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5
lib/CodeGen/RegAllocFast.cpp
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@ -299,7 +299,7 @@ void RAFast::spillVirtReg(MachineBasicBlock::iterator MI,
MachineInstr *DBG = LRIDbgValues[li]; MachineInstr *DBG = LRIDbgValues[li];
const MDNode *MDPtr = DBG->getOperand(2).getMetadata(); const MDNode *MDPtr = DBG->getOperand(2).getMetadata();
bool IsIndirect = DBG->getOperand(1).isImm(); // Register-indirect value? bool IsIndirect = DBG->getOperand(1).isImm(); // Register-indirect value?
int64_t Offset = IsIndirect ? DBG->getOperand(1).getImm() : 0; uint64_t Offset = IsIndirect ? DBG->getOperand(1).getImm() : 0;
DebugLoc DL; DebugLoc DL;
if (MI == MBB->end()) { if (MI == MBB->end()) {
// If MI is at basic block end then use last instruction's location. // If MI is at basic block end then use last instruction's location.
@ -856,7 +856,8 @@ void RAFast::AllocateBasicBlock() {
} }
else { else {
// Modify DBG_VALUE now that the value is in a spill slot. // Modify DBG_VALUE now that the value is in a spill slot.
int64_t Offset = MI->getOperand(1).getImm(); bool IsIndirect = MI->getOperand(1).isImm();
uint64_t Offset = IsIndirect ? MI->getOperand(1).getImm() : 0;
const MDNode *MDPtr = const MDNode *MDPtr =
MI->getOperand(MI->getNumOperands()-1).getMetadata(); MI->getOperand(MI->getNumOperands()-1).getMetadata();
DebugLoc DL = MI->getDebugLoc(); DebugLoc DL = MI->getDebugLoc();