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Implemented the frameaddress intrinsic for PPC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34787 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2700,7 +2700,7 @@ SDOperand PPCTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
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// Frame & Return address. Currently unimplemented
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case ISD::RETURNADDR: break;
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case ISD::FRAMEADDR: break;
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case ISD::FRAMEADDR: return LowerFRAMEADDR(Op, DAG);
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}
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return SDOperand();
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}
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@ -3171,3 +3171,25 @@ bool PPCTargetLowering::isLegalAddressImmediate(int64_t V) const {
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bool PPCTargetLowering::isLegalAddressImmediate(llvm::GlobalValue* GV) const {
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return TargetLowering::isLegalAddressImmediate(GV);
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}
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SDOperand PPCTargetLowering::LowerFRAMEADDR(SDOperand Op, SelectionDAG &DAG)
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{
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// Depths > 0 not supported yet!
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if (cast<ConstantSDNode>(Op.getOperand(0))->getValue() > 0)
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return SDOperand();
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MVT::ValueType PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
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bool isPPC64 = PtrVT == MVT::i64;
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MachineFunction &MF = DAG.getMachineFunction();
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MachineFrameInfo *MFI = MF.getFrameInfo();
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bool is31 = (NoFramePointerElim || MFI->hasVarSizedObjects())
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&& MFI->getStackSize();
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if (isPPC64)
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return DAG.getCopyFromReg(DAG.getEntryNode(), is31 ? PPC::X31 : PPC::X1,
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MVT::i32);
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else
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return DAG.getCopyFromReg(DAG.getEntryNode(), is31 ? PPC::R31 : PPC::R1,
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MVT::i32);
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}
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@ -240,6 +240,8 @@ namespace llvm {
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/// as the offset of the target addressing mode.
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virtual bool isLegalAddressImmediate(int64_t V) const;
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virtual bool isLegalAddressImmediate(llvm::GlobalValue*) const;
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SDOperand LowerFRAMEADDR(SDOperand Op, SelectionDAG &DAG);
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};
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}
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