diff --git a/lib/Analysis/IPA/Andersens.cpp b/lib/Analysis/IPA/Andersens.cpp index e6a6e2e37c3..c6075e1c610 100644 --- a/lib/Analysis/IPA/Andersens.cpp +++ b/lib/Analysis/IPA/Andersens.cpp @@ -2724,13 +2724,14 @@ unsigned Andersens::UniteNodes(unsigned First, unsigned Second, DOUT << "\n"; if (SDTActive) - if (SDT[Second] >= 0) + if (SDT[Second] >= 0) { if (SDT[First] < 0) SDT[First] = SDT[Second]; else { UniteNodes( FindNode(SDT[First]), FindNode(SDT[Second]) ); First = FindNode(First); } + } return First; } diff --git a/lib/CodeGen/RegisterScavenging.cpp b/lib/CodeGen/RegisterScavenging.cpp index 1d9effb1108..e8329781ac3 100644 --- a/lib/CodeGen/RegisterScavenging.cpp +++ b/lib/CodeGen/RegisterScavenging.cpp @@ -37,11 +37,12 @@ static bool RedefinesSuperRegPart(const MachineInstr *MI, unsigned SubReg, const MachineOperand &MO = MI->getOperand(i); if (!MO.isRegister()) continue; - if (TRI->isSuperRegister(SubReg, MO.getReg())) + if (TRI->isSuperRegister(SubReg, MO.getReg())) { if (MO.isUse()) SeenSuperUse = true; else if (MO.isImplicit()) SeenSuperDef = true; + } } return SeenSuperDef && SeenSuperUse; diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index ff505f2c0db..44c72b6bec4 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -2986,7 +2986,7 @@ SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, } bool Indexed = AM != ISD::UNINDEXED; - assert(Indexed || Offset.getOpcode() == ISD::UNDEF && + assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && "Unindexed load with an offset!"); SDVTList VTs = Indexed ? diff --git a/lib/Target/CBackend/CBackend.cpp b/lib/Target/CBackend/CBackend.cpp index 4036d08f627..2ace6ebd8b6 100644 --- a/lib/Target/CBackend/CBackend.cpp +++ b/lib/Target/CBackend/CBackend.cpp @@ -3205,11 +3205,12 @@ void CWriter::visitShuffleVectorInst(ShuffleVectorInst &SVI) { Out << "(("; printType(Out, PointerType::getUnqual(EltTy)); Out << ")(&" << GetValueName(Op) - << "))[" << (SrcVal & NumElts-1) << "]"; + << "))[" << (SrcVal & (NumElts-1)) << "]"; } else if (isa(Op) || isa(Op)) { Out << "0"; } else { - printConstant(cast(Op)->getOperand(SrcVal & NumElts-1)); + printConstant(cast(Op)->getOperand(SrcVal & + (NumElts-1))); } } } diff --git a/lib/Transforms/IPO/ArgumentPromotion.cpp b/lib/Transforms/IPO/ArgumentPromotion.cpp index 7dd94f5bc82..7feb1744a06 100644 --- a/lib/Transforms/IPO/ArgumentPromotion.cpp +++ b/lib/Transforms/IPO/ArgumentPromotion.cpp @@ -148,7 +148,7 @@ bool ArgPromotion::PromoteArguments(CallGraphNode *CGN) { Argument *PtrArg = PointerArgs[i].first; if (isByVal) { const Type *AgTy = cast(PtrArg->getType())->getElementType(); - if (const StructType *STy = dyn_cast(AgTy)) + if (const StructType *STy = dyn_cast(AgTy)) { if (maxElements > 0 && STy->getNumElements() > maxElements) { DOUT << "argpromotion disable promoting argument '" << PtrArg->getName() << "' because it would require adding more " @@ -170,6 +170,7 @@ bool ArgPromotion::PromoteArguments(CallGraphNode *CGN) { continue; } } + } } // Otherwise, see if we can promote the pointer to its value. diff --git a/lib/Transforms/Scalar/JumpThreading.cpp b/lib/Transforms/Scalar/JumpThreading.cpp index 407d081b781..4e57f0e74cd 100644 --- a/lib/Transforms/Scalar/JumpThreading.cpp +++ b/lib/Transforms/Scalar/JumpThreading.cpp @@ -282,8 +282,8 @@ bool JumpThreading::ProcessBranchOnLogical(Value *V, BasicBlock *BB, // If this is a binary operator tree of the same AND/OR opcode, check the // LHS/RHS. if (BinaryOperator *BO = dyn_cast(V)) - if (isAnd && BO->getOpcode() == Instruction::And || - !isAnd && BO->getOpcode() == Instruction::Or) { + if ((isAnd && BO->getOpcode() == Instruction::And) || + (!isAnd && BO->getOpcode() == Instruction::Or)) { if (ProcessBranchOnLogical(BO->getOperand(0), BB, isAnd)) return true; if (ProcessBranchOnLogical(BO->getOperand(1), BB, isAnd))