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give all operands names
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23356 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -275,8 +275,8 @@ def crbitm: Operand<i8> {
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def PHI : Pseudo<(ops variable_ops), "; PHI">;
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let isLoad = 1 in {
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def ADJCALLSTACKDOWN : Pseudo<(ops u16imm), "; ADJCALLSTACKDOWN">;
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def ADJCALLSTACKUP : Pseudo<(ops u16imm), "; ADJCALLSTACKUP">;
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def ADJCALLSTACKDOWN : Pseudo<(ops u16imm:$amt), "; ADJCALLSTACKDOWN">;
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def ADJCALLSTACKUP : Pseudo<(ops u16imm:$amt), "; ADJCALLSTACKUP">;
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}
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def IMPLICIT_DEF_GPR : Pseudo<(ops GPRC:$rD), "; $rD = IMPLICIT_DEF_GPRC">;
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def IMPLICIT_DEF_FP : Pseudo<(ops FPRC:$rD), "; %rD = IMPLICIT_DEF_FP">;
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@ -301,7 +301,8 @@ let Defs = [LR] in
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def MovePCtoLR : Pseudo<(ops piclabel:$label), "bl $label">;
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let isBranch = 1, isTerminator = 1 in {
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def COND_BRANCH : Pseudo<(ops CRRC:$crS, u16imm, target:$true, target:$false),
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def COND_BRANCH : Pseudo<(ops CRRC:$crS, u16imm:$opc,
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target:$true, target:$false),
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"; COND_BRANCH">;
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def B : IForm<18, 0, 0, (ops target:$func), "b $func">;
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//def BA : IForm<18, 1, 0, (ops target:$func), "ba $func">;
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@ -145,8 +145,9 @@ class Ii32<bits<8> o, Format f, dag ops, string asm>
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def PHI : I<0, Pseudo, (ops variable_ops), "PHINODE">; // PHI node.
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def NOOP : I<0x90, RawFrm, (ops), "nop">; // nop
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def ADJCALLSTACKDOWN : I<0, Pseudo, (ops i32imm), "#ADJCALLSTACKDOWN">;
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def ADJCALLSTACKUP : I<0, Pseudo, (ops i32imm, i32imm), "#ADJCALLSTACKUP">;
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def ADJCALLSTACKDOWN : I<0, Pseudo, (ops i32imm:$amt), "#ADJCALLSTACKDOWN">;
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def ADJCALLSTACKUP : I<0, Pseudo, (ops i32imm:$amt1, i32imm:$amt2),
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"#ADJCALLSTACKUP">;
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def IMPLICIT_USE : I<0, Pseudo, (ops variable_ops), "#IMPLICIT_USE">;
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def IMPLICIT_DEF : I<0, Pseudo, (ops variable_ops), "#IMPLICIT_DEF">;
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let isTerminator = 1 in
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@ -1563,20 +1564,20 @@ class FPI<bits<8> o, Format F, FPFormat fp, dag ops, string asm>
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// forms of instructions for doing these operations. Until the stackifier runs,
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// we prefer to be abstract.
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def FpMOV : FPI<0, Pseudo, SpecialFP,
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(ops RFP, RFP), "">; // f1 = fmov f2
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(ops RFP:$dst, RFP:$src), "">; // f1 = fmov f2
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def FpADD : FPI<0, Pseudo, TwoArgFP ,
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(ops RFP, RFP, RFP), "">; // f1 = fadd f2, f3
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(ops RFP:$dst, RFP:$src1, RFP:$src2), "">; // f1 = fadd f2, f3
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def FpSUB : FPI<0, Pseudo, TwoArgFP ,
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(ops RFP, RFP, RFP), "">; // f1 = fsub f2, f3
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(ops RFP:$dst, RFP:$src1, RFP:$src2), "">; // f1 = fsub f2, f3
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def FpMUL : FPI<0, Pseudo, TwoArgFP ,
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(ops RFP, RFP, RFP), "">; // f1 = fmul f2, f3
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(ops RFP:$dst, RFP:$src1, RFP:$src2), "">; // f1 = fmul f2, f3
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def FpDIV : FPI<0, Pseudo, TwoArgFP ,
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(ops RFP, RFP, RFP), "">; // f1 = fdiv f2, f3
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(ops RFP:$dst, RFP:$src1, RFP:$src2), "">; // f1 = fdiv f2, f3
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def FpGETRESULT : FPI<0, Pseudo, SpecialFP, (ops RFP), "">,
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def FpGETRESULT : FPI<0, Pseudo, SpecialFP, (ops RFP:$dst), "">,
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Imp<[ST0], []>; // FPR = ST(0)
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def FpSETRESULT : FPI<0, Pseudo, SpecialFP, (ops RFP), "">,
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def FpSETRESULT : FPI<0, Pseudo, SpecialFP, (ops RFP:$src), "">,
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Imp<[], [ST0]>; // ST(0) = FPR
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// FADD reg, mem: Before stackification, these are represented by:
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