Add support for generating CMPXCHG16B on x86-64 for the cmpxchg IR instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138660 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eli Friedman
2011-08-26 21:21:21 +00:00
parent 51fb91c04c
commit 43f51aeca8
8 changed files with 107 additions and 48 deletions

View File

@ -100,6 +100,10 @@ protected:
/// operands. This may require setting a feature bit in the processor.
bool HasVectorUAMem;
/// HasCmpxchg16b - True if this processor has the CMPXCHG16B instruction;
/// this is true for most x86-64 chips, but not the first AMD chips.
bool HasCmpxchg16b;
/// stackAlignment - The minimum alignment known to hold of the stack frame on
/// entry to the function and which must be maintained by every function.
unsigned stackAlignment;
@ -168,6 +172,7 @@ public:
bool isBTMemSlow() const { return IsBTMemSlow; }
bool isUnalignedMemAccessFast() const { return IsUAMemFast; }
bool hasVectorUAMem() const { return HasVectorUAMem; }
bool hasCmpxchg16b() const { return HasCmpxchg16b; }
const Triple &getTargetTriple() const { return TargetTriple; }