From 43f820d1f7638656be2158efac7dd8f5b08b8b77 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Sun, 5 Oct 2003 21:20:13 +0000 Subject: [PATCH] Change the interface to PromoteMemToReg to also take a DominatorTree git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8883 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/Transforms/Utils/PromoteMemToReg.h | 4 +++- lib/Transforms/Scalar/LICM.cpp | 5 +++-- lib/Transforms/Scalar/ScalarReplAggregates.cpp | 5 ++++- lib/Transforms/Utils/Mem2Reg.cpp | 6 +++++- lib/Transforms/Utils/PromoteMemoryToRegister.cpp | 3 ++- 5 files changed, 17 insertions(+), 6 deletions(-) diff --git a/include/llvm/Transforms/Utils/PromoteMemToReg.h b/include/llvm/Transforms/Utils/PromoteMemToReg.h index 436fa43a31d..a72d7b4e7c9 100644 --- a/include/llvm/Transforms/Utils/PromoteMemToReg.h +++ b/include/llvm/Transforms/Utils/PromoteMemToReg.h @@ -9,6 +9,7 @@ #define TRANSFORMS_UTILS_PROMOTEMEMTOREG_H class AllocaInst; +class DominatorTree; class DominanceFrontier; class TargetData; #include @@ -24,6 +25,7 @@ bool isAllocaPromotable(const AllocaInst *AI, const TargetData &TD); /// of the function at all. All allocas must be from the same function. /// void PromoteMemToReg(const std::vector &Allocas, - DominanceFrontier &DF, const TargetData &TD); + DominatorTree &DT, DominanceFrontier &DF, + const TargetData &TD); #endif diff --git a/lib/Transforms/Scalar/LICM.cpp b/lib/Transforms/Scalar/LICM.cpp index b66b830ca7c..eb7a64d765e 100644 --- a/lib/Transforms/Scalar/LICM.cpp +++ b/lib/Transforms/Scalar/LICM.cpp @@ -63,6 +63,7 @@ namespace { private: LoopInfo *LI; // Current LoopInfo AliasAnalysis *AA; // Current AliasAnalysis information + DominanceFrontier *DF; // Current Dominance Frontier bool Changed; // Set to true when we change anything. BasicBlock *Preheader; // The preheader block of the current loop... Loop *CurLoop; // The current loop we are working on... @@ -173,6 +174,7 @@ bool LICM::runOnFunction(Function &) { // Get our Loop and Alias Analysis information... LI = &getAnalysis(); AA = &getAnalysis(); + DF = &getAnalysis(); DT = &getAnalysis(); // Hoist expressions out of all of the top-level loops. @@ -405,8 +407,7 @@ void LICM::PromoteValuesInLoop() { PromotedAllocas.reserve(PromotedValues.size()); for (unsigned i = 0, e = PromotedValues.size(); i != e; ++i) PromotedAllocas.push_back(PromotedValues[i].first); - PromoteMemToReg(PromotedAllocas, getAnalysis(), - AA->getTargetData()); + PromoteMemToReg(PromotedAllocas, *DT, *DF, AA->getTargetData()); } /// findPromotableValuesInLoop - Check the current loop for stores to definite diff --git a/lib/Transforms/Scalar/ScalarReplAggregates.cpp b/lib/Transforms/Scalar/ScalarReplAggregates.cpp index adcbaffac00..4b23ea2fbdb 100644 --- a/lib/Transforms/Scalar/ScalarReplAggregates.cpp +++ b/lib/Transforms/Scalar/ScalarReplAggregates.cpp @@ -38,6 +38,7 @@ namespace { // getAnalysisUsage - This pass does not require any passes, but we know it // will not alter the CFG, so say so. virtual void getAnalysisUsage(AnalysisUsage &AU) const { + AU.addRequired(); AU.addRequired(); AU.addRequired(); AU.setPreservesCFG(); @@ -74,6 +75,8 @@ bool SROA::runOnFunction(Function &F) { bool SROA::performPromotion(Function &F) { std::vector Allocas; const TargetData &TD = getAnalysis(); + DominatorTree &DT = getAnalysis(); + DominanceFrontier &DF = getAnalysis(); BasicBlock &BB = F.getEntryBlock(); // Get the entry node for the function @@ -91,7 +94,7 @@ bool SROA::performPromotion(Function &F) { if (Allocas.empty()) break; - PromoteMemToReg(Allocas, getAnalysis(), TD); + PromoteMemToReg(Allocas, DT, DF, TD); NumPromoted += Allocas.size(); Changed = true; } diff --git a/lib/Transforms/Utils/Mem2Reg.cpp b/lib/Transforms/Utils/Mem2Reg.cpp index 16d05d8213d..52033940997 100644 --- a/lib/Transforms/Utils/Mem2Reg.cpp +++ b/lib/Transforms/Utils/Mem2Reg.cpp @@ -25,6 +25,7 @@ namespace { // getAnalysisUsage - We need dominance frontiers // virtual void getAnalysisUsage(AnalysisUsage &AU) const { + AU.addRequired(); AU.addRequired(); AU.addRequired(); AU.setPreservesCFG(); @@ -41,6 +42,9 @@ bool PromotePass::runOnFunction(Function &F) { BasicBlock &BB = F.getEntryBlock(); // Get the entry node for the function bool Changed = false; + + DominatorTree &DT = getAnalysis(); + DominanceFrontier &DF = getAnalysis(); while (1) { Allocas.clear(); @@ -54,7 +58,7 @@ bool PromotePass::runOnFunction(Function &F) { if (Allocas.empty()) break; - PromoteMemToReg(Allocas, getAnalysis(), TD); + PromoteMemToReg(Allocas, DT, DF, TD); NumPromoted += Allocas.size(); Changed = true; } diff --git a/lib/Transforms/Utils/PromoteMemoryToRegister.cpp b/lib/Transforms/Utils/PromoteMemoryToRegister.cpp index 019203d3fa8..ce964fc43fd 100644 --- a/lib/Transforms/Utils/PromoteMemoryToRegister.cpp +++ b/lib/Transforms/Utils/PromoteMemoryToRegister.cpp @@ -361,7 +361,8 @@ void PromoteMem2Reg::RenamePass(BasicBlock *BB, BasicBlock *Pred, /// of the function at all. All allocas must be from the same function. /// void PromoteMemToReg(const std::vector &Allocas, - DominanceFrontier &DF, const TargetData &TD) { + DominatorTree &DT, DominanceFrontier &DF, + const TargetData &TD) { // If there is nothing to do, bail out... if (Allocas.empty()) return; PromoteMem2Reg(Allocas, DF, TD).run();