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Compile:

Browse Source 
long long X3_2(long long Y) { return Y+Y; }
int X(int Y) { return Y+Y; }

into:

X3_2:
        movl 4(%esp), %eax
        movl 8(%esp), %edx
        addl %eax, %eax
        adcl %edx, %edx
        ret
X:
        movl 4(%esp), %eax
        addl %eax, %eax
        ret

instead of:

X3_2:
        movl 4(%esp), %eax
        movl 8(%esp), %edx
        shldl $1, %eax, %edx
        shll $1, %eax
        ret

X:
        movl 4(%esp), %eax
        shll $1, %eax
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17705 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2004-11-13 20:03:48 +00:00
parent 50af16a97b
commit 44205cadba
1 changed files with 14 additions and 4 deletions
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18
lib/Target/X86/X86ISelSimple.cpp
View File

@ -2925,7 +2925,12 @@ void X86ISel::emitShiftOperation(MachineBasicBlock *MBB,
//
if (ConstantUInt *CUI = dyn_cast<ConstantUInt>(ShiftAmount)) {
unsigned Amount = CUI->getValue();
if (Amount < 32) {
if (Amount == 1) { // X << 1 == X+X
BuildMI(*MBB, IP, X86::ADD32rr, 2,
DestReg).addReg(SrcReg).addReg(SrcReg);
BuildMI(*MBB, IP, X86::ADC32rr, 2,
DestReg+1).addReg(SrcReg+1).addReg(SrcReg+1);
} else if (Amount < 32) {
const unsigned *Opc = ConstantOperand[isLeftShift*2+isSigned];
if (isLeftShift) {
BuildMI(*MBB, IP, Opc[3], 3,
@ -3018,9 +3023,14 @@ void X86ISel::emitShiftOperation(MachineBasicBlock *MBB,
// The shift amount is constant, guaranteed to be a ubyte. Get its value.
assert(CUI->getType() == Type::UByteTy && "Shift amount not a ubyte?");
const unsigned *Opc = ConstantOperand[isLeftShift*2+isSigned];
BuildMI(*MBB, IP, Opc[Class], 2,
DestReg).addReg(SrcReg).addImm(CUI->getValue());
if (CUI->getValue() == 1 && isLeftShift) { // X << 1 -> X+X
static const int AddOpC[] = { X86::ADD8rr, X86::ADD16rr, X86::ADD32rr };
BuildMI(*MBB, IP, AddOpC[Class], 2,DestReg).addReg(SrcReg).addReg(SrcReg);
} else {
const unsigned *Opc = ConstantOperand[isLeftShift*2+isSigned];
BuildMI(*MBB, IP, Opc[Class], 2,
DestReg).addReg(SrcReg).addImm(CUI->getValue());
}
} else { // The shift amount is non-constant.
unsigned ShiftAmountReg = getReg (ShiftAmount, MBB, IP);
BuildMI(*MBB, IP, X86::MOV8rr, 1, X86::CL).addReg(ShiftAmountReg);