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Compile:
long long X3_2(long long Y) { return Y+Y; } int X(int Y) { return Y+Y; } into: X3_2: movl 4(%esp), %eax movl 8(%esp), %edx addl %eax, %eax adcl %edx, %edx ret X: movl 4(%esp), %eax addl %eax, %eax ret instead of: X3_2: movl 4(%esp), %eax movl 8(%esp), %edx shldl $1, %eax, %edx shll $1, %eax ret X: movl 4(%esp), %eax shll $1, %eax ret git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17705 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2925,7 +2925,12 @@ void X86ISel::emitShiftOperation(MachineBasicBlock *MBB,
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//
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if (ConstantUInt *CUI = dyn_cast<ConstantUInt>(ShiftAmount)) {
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unsigned Amount = CUI->getValue();
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if (Amount < 32) {
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if (Amount == 1) { // X << 1 == X+X
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BuildMI(*MBB, IP, X86::ADD32rr, 2,
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DestReg).addReg(SrcReg).addReg(SrcReg);
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BuildMI(*MBB, IP, X86::ADC32rr, 2,
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DestReg+1).addReg(SrcReg+1).addReg(SrcReg+1);
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} else if (Amount < 32) {
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const unsigned *Opc = ConstantOperand[isLeftShift*2+isSigned];
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if (isLeftShift) {
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BuildMI(*MBB, IP, Opc[3], 3,
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@ -3018,9 +3023,14 @@ void X86ISel::emitShiftOperation(MachineBasicBlock *MBB,
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// The shift amount is constant, guaranteed to be a ubyte. Get its value.
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assert(CUI->getType() == Type::UByteTy && "Shift amount not a ubyte?");
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const unsigned *Opc = ConstantOperand[isLeftShift*2+isSigned];
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BuildMI(*MBB, IP, Opc[Class], 2,
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DestReg).addReg(SrcReg).addImm(CUI->getValue());
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if (CUI->getValue() == 1 && isLeftShift) { // X << 1 -> X+X
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static const int AddOpC[] = { X86::ADD8rr, X86::ADD16rr, X86::ADD32rr };
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BuildMI(*MBB, IP, AddOpC[Class], 2,DestReg).addReg(SrcReg).addReg(SrcReg);
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} else {
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const unsigned *Opc = ConstantOperand[isLeftShift*2+isSigned];
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BuildMI(*MBB, IP, Opc[Class], 2,
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DestReg).addReg(SrcReg).addImm(CUI->getValue());
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}
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} else { // The shift amount is non-constant.
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unsigned ShiftAmountReg = getReg (ShiftAmount, MBB, IP);
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BuildMI(*MBB, IP, X86::MOV8rr, 1, X86::CL).addReg(ShiftAmountReg);
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