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Change errs() to dbgs().

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92595 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
David Greene
2010-01-05 01:26:05 +00:00
parent e1b2129471
commit 4424817a0d
1 changed files with 17 additions and 17 deletions
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34
lib/CodeGen/RegAllocLocal.cpp
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@ -296,11 +296,11 @@ void RALocal::spillVirtReg(MachineBasicBlock &MBB,
assert(VirtReg && "Spilling a physical register is illegal!" assert(VirtReg && "Spilling a physical register is illegal!"
" Must not have appropriate kill for the register or use exists beyond" " Must not have appropriate kill for the register or use exists beyond"
" the intended one."); " the intended one.");
DEBUG(errs() << " Spilling register " << TRI->getName(PhysReg) DEBUG(dbgs() << " Spilling register " << TRI->getName(PhysReg)
<< " containing %reg" << VirtReg); << " containing %reg" << VirtReg);
if (!isVirtRegModified(VirtReg)) { if (!isVirtRegModified(VirtReg)) {
DEBUG(errs() << " which has not been modified, so no store necessary!"); DEBUG(dbgs() << " which has not been modified, so no store necessary!");
std::pair<MachineInstr*, unsigned> &LastUse = getVirtRegLastUse(VirtReg); std::pair<MachineInstr*, unsigned> &LastUse = getVirtRegLastUse(VirtReg);
if (LastUse.first) if (LastUse.first)
LastUse.first->getOperand(LastUse.second).setIsKill(); LastUse.first->getOperand(LastUse.second).setIsKill();
@ -310,7 +310,7 @@ void RALocal::spillVirtReg(MachineBasicBlock &MBB,
// modified. // modified.
const TargetRegisterClass *RC = MF->getRegInfo().getRegClass(VirtReg); const TargetRegisterClass *RC = MF->getRegInfo().getRegClass(VirtReg);
int FrameIndex = getStackSpaceFor(VirtReg, RC); int FrameIndex = getStackSpaceFor(VirtReg, RC);
DEBUG(errs() << " to stack slot #" << FrameIndex); DEBUG(dbgs() << " to stack slot #" << FrameIndex);
// If the instruction reads the register that's spilled, (e.g. this can // If the instruction reads the register that's spilled, (e.g. this can
// happen if it is a move to a physical register), then the spill // happen if it is a move to a physical register), then the spill
// instruction is not a kill. // instruction is not a kill.
@ -321,7 +321,7 @@ void RALocal::spillVirtReg(MachineBasicBlock &MBB,
getVirt2PhysRegMapSlot(VirtReg) = 0; // VirtReg no longer available getVirt2PhysRegMapSlot(VirtReg) = 0; // VirtReg no longer available
DEBUG(errs() << '\n'); DEBUG(dbgs() << '\n');
removePhysReg(PhysReg); removePhysReg(PhysReg);
} }
@ -516,7 +516,7 @@ MachineInstr *RALocal::reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
markVirtRegModified(VirtReg, false); // Note that this reg was just reloaded markVirtRegModified(VirtReg, false); // Note that this reg was just reloaded
DEBUG(errs() << " Reloading %reg" << VirtReg << " into " DEBUG(dbgs() << " Reloading %reg" << VirtReg << " into "
<< TRI->getName(PhysReg) << "\n"); << TRI->getName(PhysReg) << "\n");
// Add move instruction(s) // Add move instruction(s)
@ -725,7 +725,7 @@ void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
DEBUG({ DEBUG({
const BasicBlock *LBB = MBB.getBasicBlock(); const BasicBlock *LBB = MBB.getBasicBlock();
if (LBB) if (LBB)
errs() << "\nStarting RegAlloc of BB: " << LBB->getName(); dbgs() << "\nStarting RegAlloc of BB: " << LBB->getName();
}); });
// Add live-in registers as active. // Add live-in registers as active.
@ -752,13 +752,13 @@ void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
MachineInstr *MI = MII++; MachineInstr *MI = MII++;
const TargetInstrDesc &TID = MI->getDesc(); const TargetInstrDesc &TID = MI->getDesc();
DEBUG({ DEBUG({
errs() << "\nStarting RegAlloc of: " << *MI; dbgs() << "\nStarting RegAlloc of: " << *MI;
errs() << " Regs have values: "; dbgs() << " Regs have values: ";
for (unsigned i = 0; i != TRI->getNumRegs(); ++i) for (unsigned i = 0; i != TRI->getNumRegs(); ++i)
if (PhysRegsUsed[i] != -1 && PhysRegsUsed[i] != -2) if (PhysRegsUsed[i] != -1 && PhysRegsUsed[i] != -2)
errs() << "[" << TRI->getName(i) dbgs() << "[" << TRI->getName(i)
<< ",%reg" << PhysRegsUsed[i] << "] "; << ",%reg" << PhysRegsUsed[i] << "] ";
errs() << '\n'; dbgs() << '\n';
}); });
// Determine whether this is a copy instruction. The cases where the // Determine whether this is a copy instruction. The cases where the
@ -809,7 +809,7 @@ void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
markVirtRegModified(DestVirtReg); markVirtRegModified(DestVirtReg);
getVirtRegLastUse(DestVirtReg) = getVirtRegLastUse(DestVirtReg) =
std::make_pair((MachineInstr*)0, 0); std::make_pair((MachineInstr*)0, 0);
DEBUG(errs() << " Assigning " << TRI->getName(DestPhysReg) DEBUG(dbgs() << " Assigning " << TRI->getName(DestPhysReg)
<< " to %reg" << DestVirtReg << "\n"); << " to %reg" << DestVirtReg << "\n");
MO.setReg(DestPhysReg); // Assign the earlyclobber register MO.setReg(DestPhysReg); // Assign the earlyclobber register
} else { } else {
@ -876,13 +876,13 @@ void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
} }
if (PhysReg) { if (PhysReg) {
DEBUG(errs() << " Last use of " << TRI->getName(PhysReg) DEBUG(dbgs() << " Last use of " << TRI->getName(PhysReg)
<< "[%reg" << VirtReg <<"], removing it from live set\n"); << "[%reg" << VirtReg <<"], removing it from live set\n");
removePhysReg(PhysReg); removePhysReg(PhysReg);
for (const unsigned *SubRegs = TRI->getSubRegisters(PhysReg); for (const unsigned *SubRegs = TRI->getSubRegisters(PhysReg);
*SubRegs; ++SubRegs) { *SubRegs; ++SubRegs) {
if (PhysRegsUsed[*SubRegs] != -2) { if (PhysRegsUsed[*SubRegs] != -2) {
DEBUG(errs() << " Last use of " DEBUG(dbgs() << " Last use of "
<< TRI->getName(*SubRegs) << "[%reg" << VirtReg << TRI->getName(*SubRegs) << "[%reg" << VirtReg
<<"], removing it from live set\n"); <<"], removing it from live set\n");
removePhysReg(*SubRegs); removePhysReg(*SubRegs);
@ -978,7 +978,7 @@ void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
MF->getRegInfo().setPhysRegUsed(DestPhysReg); MF->getRegInfo().setPhysRegUsed(DestPhysReg);
markVirtRegModified(DestVirtReg); markVirtRegModified(DestVirtReg);
getVirtRegLastUse(DestVirtReg) = std::make_pair((MachineInstr*)0, 0); getVirtRegLastUse(DestVirtReg) = std::make_pair((MachineInstr*)0, 0);
DEBUG(errs() << " Assigning " << TRI->getName(DestPhysReg) DEBUG(dbgs() << " Assigning " << TRI->getName(DestPhysReg)
<< " to %reg" << DestVirtReg << "\n"); << " to %reg" << DestVirtReg << "\n");
MO.setReg(DestPhysReg); // Assign the output register MO.setReg(DestPhysReg); // Assign the output register
} }
@ -1001,14 +1001,14 @@ void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
} }
if (PhysReg) { if (PhysReg) {
DEBUG(errs() << " Register " << TRI->getName(PhysReg) DEBUG(dbgs() << " Register " << TRI->getName(PhysReg)
<< " [%reg" << VirtReg << " [%reg" << VirtReg
<< "] is never used, removing it from live set\n"); << "] is never used, removing it from live set\n");
removePhysReg(PhysReg); removePhysReg(PhysReg);
for (const unsigned *AliasSet = TRI->getAliasSet(PhysReg); for (const unsigned *AliasSet = TRI->getAliasSet(PhysReg);
*AliasSet; ++AliasSet) { *AliasSet; ++AliasSet) {
if (PhysRegsUsed[*AliasSet] != -2) { if (PhysRegsUsed[*AliasSet] != -2) {
DEBUG(errs() << " Register " << TRI->getName(*AliasSet) DEBUG(dbgs() << " Register " << TRI->getName(*AliasSet)
<< " [%reg" << *AliasSet << " [%reg" << *AliasSet
<< "] is never used, removing it from live set\n"); << "] is never used, removing it from live set\n");
removePhysReg(*AliasSet); removePhysReg(*AliasSet);
@ -1058,7 +1058,7 @@ void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
/// runOnMachineFunction - Register allocate the whole function /// runOnMachineFunction - Register allocate the whole function
/// ///
bool RALocal::runOnMachineFunction(MachineFunction &Fn) { bool RALocal::runOnMachineFunction(MachineFunction &Fn) {
DEBUG(errs() << "Machine Function\n"); DEBUG(dbgs() << "Machine Function\n");
MF = &Fn; MF = &Fn;
TM = &Fn.getTarget(); TM = &Fn.getTarget();
TRI = TM->getRegisterInfo(); TRI = TM->getRegisterInfo();