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https://github.com/c64scene-ar/llvm-6502.git
synced 2025-03-06 20:33:54 +00:00
Wrap the error msgs in DEBUG() macro so that they won't appear in NDEBUG build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101329 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -13,8 +13,11 @@
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//
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//
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "arm-disassembler"
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#include "ARMDisassemblerCore.h"
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#include "ARMDisassemblerCore.h"
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#include "ARMAddressingModes.h"
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#include "ARMAddressingModes.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Support/raw_ostream.h"
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/// ARMGenInstrInfo.inc - ARMGenInstrInfo.inc contains the static const
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/// ARMGenInstrInfo.inc - ARMGenInstrInfo.inc contains the static const
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@ -346,7 +349,7 @@ static unsigned getRegisterEnum(BO B, unsigned RegClassID, unsigned RawRegister,
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}
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}
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break;
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break;
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}
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}
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errs() << "Invalid (RegClassID, RawRegister) combination\n";
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DEBUG(errs() << "Invalid (RegClassID, RawRegister) combination\n");
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// Encoding error. Mark the builder with error code != 0.
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// Encoding error. Mark the builder with error code != 0.
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B->SetErr(-1);
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B->SetErr(-1);
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return 0;
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return 0;
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@ -893,7 +896,7 @@ static inline bool getBFCInvMask(uint32_t insn, uint32_t &mask) {
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uint32_t msb = slice(insn, 20, 16);
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uint32_t msb = slice(insn, 20, 16);
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uint32_t Val = 0;
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uint32_t Val = 0;
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if (msb < lsb) {
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if (msb < lsb) {
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errs() << "Encoding error: msb < lsb\n";
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DEBUG(errs() << "Encoding error: msb < lsb\n");
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return false;
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return false;
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}
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}
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@ -1911,7 +1914,7 @@ static bool DisassembleVFPLdStMulFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
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ARM_AM::AMSubMode SubMode = getAMSubModeForBits(getPUBits(insn));
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ARM_AM::AMSubMode SubMode = getAMSubModeForBits(getPUBits(insn));
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// Must be either "ia" or "db" submode.
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// Must be either "ia" or "db" submode.
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if (SubMode != ARM_AM::ia && SubMode != ARM_AM::db) {
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if (SubMode != ARM_AM::ia && SubMode != ARM_AM::db) {
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errs() << "Illegal addressing mode 5 sub-mode!\n";
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DEBUG(errs() << "Illegal addressing mode 5 sub-mode!\n");
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return false;
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return false;
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}
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}
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@ -1553,7 +1553,7 @@ static bool DisassembleThumb2DPBinImm(MCInst &MI, unsigned Opcode,
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MI.addOperand(MCOperand::CreateImm(getLsb(insn)));
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MI.addOperand(MCOperand::CreateImm(getLsb(insn)));
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if (Opcode == ARM::t2BFI) {
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if (Opcode == ARM::t2BFI) {
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if (getMsb(insn) < getLsb(insn)) {
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if (getMsb(insn) < getLsb(insn)) {
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errs() << "Encoding error: msb < lsb\n";
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DEBUG(errs() << "Encoding error: msb < lsb\n");
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return false;
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return false;
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}
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}
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MI.addOperand(MCOperand::CreateImm(getMsb(insn) - getLsb(insn) + 1));
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MI.addOperand(MCOperand::CreateImm(getMsb(insn) - getLsb(insn) + 1));
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