mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-01-20 12:31:40 +00:00
If the result of a BIT_CONVERT is a v1* vector, it doesn't mean its source is a v1* vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51192 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
62df5c9599
commit
446efddfcd
@ -7109,10 +7109,13 @@ SDOperand SelectionDAGLegalize::ScalarizeVectorOp(SDOperand Op) {
|
|||||||
Result = Node->getOperand(0);
|
Result = Node->getOperand(0);
|
||||||
assert(Result.getValueType() == NewVT);
|
assert(Result.getValueType() == NewVT);
|
||||||
break;
|
break;
|
||||||
case ISD::BIT_CONVERT:
|
case ISD::BIT_CONVERT: {
|
||||||
Result = DAG.getNode(ISD::BIT_CONVERT, NewVT,
|
SDOperand Op0 = Op.getOperand(0);
|
||||||
ScalarizeVectorOp(Op.getOperand(0)));
|
if (MVT::getVectorNumElements(Op0.getValueType()) == 1)
|
||||||
|
Op0 = ScalarizeVectorOp(Op0);
|
||||||
|
Result = DAG.getNode(ISD::BIT_CONVERT, NewVT, Op0);
|
||||||
break;
|
break;
|
||||||
|
}
|
||||||
case ISD::SELECT:
|
case ISD::SELECT:
|
||||||
Result = DAG.getNode(ISD::SELECT, NewVT, Op.getOperand(0),
|
Result = DAG.getNode(ISD::SELECT, NewVT, Op.getOperand(0),
|
||||||
ScalarizeVectorOp(Op.getOperand(1)),
|
ScalarizeVectorOp(Op.getOperand(1)),
|
||||||
|
Loading…
x
Reference in New Issue
Block a user