6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-08-17 21:29:20 +00:00
Code Issues Projects Releases Wiki Activity

adjust to new live variables interface

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22992 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2005-08-23 23:42:17 +00:00
parent d177579860
commit 44b94c2185
3 changed files with 32 additions and 35 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

46
lib/CodeGen/LiveVariables.cpp
View File

@ -125,9 +125,9 @@ void LiveVariables::HandlePhysRegDef(unsigned Reg, MachineInstr *MI) {
// Does this kill a previous version of this register? // Does this kill a previous version of this register?
if (MachineInstr *LastUse = PhysRegInfo[Reg]) { if (MachineInstr *LastUse = PhysRegInfo[Reg]) {
if (PhysRegUsed[Reg]) if (PhysRegUsed[Reg])
RegistersKilled.insert(std::make_pair(LastUse, Reg)); RegistersKilled[LastUse].push_back(Reg);
else else
RegistersDead.insert(std::make_pair(LastUse, Reg)); RegistersDead[LastUse].push_back(Reg);
} }
PhysRegInfo[Reg] = MI; PhysRegInfo[Reg] = MI;
PhysRegUsed[Reg] = false; PhysRegUsed[Reg] = false;
@ -136,9 +136,9 @@ void LiveVariables::HandlePhysRegDef(unsigned Reg, MachineInstr *MI) {
unsigned Alias = *AliasSet; ++AliasSet) { unsigned Alias = *AliasSet; ++AliasSet) {
if (MachineInstr *LastUse = PhysRegInfo[Alias]) { if (MachineInstr *LastUse = PhysRegInfo[Alias]) {
if (PhysRegUsed[Alias]) if (PhysRegUsed[Alias])
RegistersKilled.insert(std::make_pair(LastUse, Alias)); RegistersKilled[LastUse].push_back(Alias);
else else
RegistersDead.insert(std::make_pair(LastUse, Alias)); RegistersDead[LastUse].push_back(Alias);
} }
PhysRegInfo[Alias] = MI; PhysRegInfo[Alias] = MI;
PhysRegUsed[Alias] = false; PhysRegUsed[Alias] = false;
@ -293,12 +293,12 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &MF) {
for (unsigned i = 0, e = VirtRegInfo.size(); i != e; ++i) for (unsigned i = 0, e = VirtRegInfo.size(); i != e; ++i)
for (unsigned j = 0, e = VirtRegInfo[i].Kills.size(); j != e; ++j) { for (unsigned j = 0, e = VirtRegInfo[i].Kills.size(); j != e; ++j) {
if (VirtRegInfo[i].Kills[j] == VirtRegInfo[i].DefInst) if (VirtRegInfo[i].Kills[j] == VirtRegInfo[i].DefInst)
RegistersDead.insert(std::make_pair(VirtRegInfo[i].Kills[j], RegistersDead[VirtRegInfo[i].Kills[j]].push_back(
i + MRegisterInfo::FirstVirtualRegister)); i + MRegisterInfo::FirstVirtualRegister);
else else
RegistersKilled.insert(std::make_pair(VirtRegInfo[i].Kills[j], RegistersKilled[VirtRegInfo[i].Kills[j]].push_back(
i + MRegisterInfo::FirstVirtualRegister)); i + MRegisterInfo::FirstVirtualRegister);
} }
// Check to make sure there are no unreachable blocks in the MC CFG for the // Check to make sure there are no unreachable blocks in the MC CFG for the
@ -342,21 +342,23 @@ void LiveVariables::instructionChanged(MachineInstr *OldMI,
// Move the killed information over... // Move the killed information over...
killed_iterator I, E; killed_iterator I, E;
tie(I, E) = killed_range(OldMI); tie(I, E) = killed_range(OldMI);
std::vector<unsigned> Regs; if (I != E) {
for (killed_iterator A = I; A != E; ++A) std::vector<unsigned> &V = RegistersKilled[NewMI];
Regs.push_back(A->second); bool WasEmpty = V.empty();
RegistersKilled.erase(I, E); V.insert(V.end(), I, E);
if (!WasEmpty)
for (unsigned i = 0, e = Regs.size(); i != e; ++i) std::sort(V.begin(), V.end()); // Keep the reg list sorted.
RegistersKilled.insert(std::make_pair(NewMI, Regs[i])); RegistersKilled.erase(OldMI);
Regs.clear(); }
// Move the dead information over... // Move the dead information over...
tie(I, E) = dead_range(OldMI); tie(I, E) = dead_range(OldMI);
for (killed_iterator A = I; A != E; ++A) if (I != E) {
Regs.push_back(A->second); std::vector<unsigned> &V = RegistersDead[NewMI];
RegistersDead.erase(I, E); bool WasEmpty = V.empty();
V.insert(V.end(), I, E);
for (unsigned i = 0, e = Regs.size(); i != e; ++i) if (!WasEmpty)
RegistersDead.insert(std::make_pair(NewMI, Regs[i])); std::sort(V.begin(), V.end()); // Keep the reg list sorted.
RegistersDead.erase(OldMI);
}
} }

15
lib/CodeGen/PHIElimination.cpp
View File

@ -125,19 +125,14 @@ bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) {
// of any registers, or if the value itself is dead, we need to move this // of any registers, or if the value itself is dead, we need to move this
// information over to the new copy we just inserted. // information over to the new copy we just inserted.
// //
std::pair<LiveVariables::killed_iterator, LiveVariables::killed_iterator> LV->removeVirtualRegistersKilled(MPhi);
RKs = LV->killed_range(MPhi);
std::vector<std::pair<MachineInstr*, unsigned> > Range;
if (RKs.first != RKs.second) // Delete the range.
LV->removeVirtualRegistersKilled(RKs.first, RKs.second);
std::pair<LiveVariables::killed_iterator, LiveVariables::killed_iterator>
RKs = LV->dead_range(MPhi); RKs = LV->dead_range(MPhi);
if (RKs.first != RKs.second) { if (RKs.first != RKs.second) {
// Works as above... for (LiveVariables::killed_iterator I = RKs.first; I != RKs.second; ++I)
Range.assign(RKs.first, RKs.second); LV->addVirtualRegisterDead(*I, PHICopy);
LV->removeVirtualRegistersDead(RKs.first, RKs.second); LV->removeVirtualRegistersDead(MPhi);
for (unsigned i = 0, e = Range.size(); i != e; ++i)
LV->addVirtualRegisterDead(Range[i].second, PHICopy);
} }
} }

4
lib/CodeGen/RegAllocLocal.cpp
View File

@ -525,7 +525,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
// //
for (LiveVariables::killed_iterator KI = LV->killed_begin(MI), for (LiveVariables::killed_iterator KI = LV->killed_begin(MI),
KE = LV->killed_end(MI); KI != KE; ++KI) { KE = LV->killed_end(MI); KI != KE; ++KI) {
unsigned VirtReg = KI->second; unsigned VirtReg = *KI;
unsigned PhysReg = VirtReg; unsigned PhysReg = VirtReg;
if (MRegisterInfo::isVirtualRegister(VirtReg)) { if (MRegisterInfo::isVirtualRegister(VirtReg)) {
// If the virtual register was never materialized into a register, it // If the virtual register was never materialized into a register, it
@ -605,7 +605,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
// //
for (LiveVariables::killed_iterator KI = LV->dead_begin(MI), for (LiveVariables::killed_iterator KI = LV->dead_begin(MI),
KE = LV->dead_end(MI); KI != KE; ++KI) { KE = LV->dead_end(MI); KI != KE; ++KI) {
unsigned VirtReg = KI->second; unsigned VirtReg = *KI;
unsigned PhysReg = VirtReg; unsigned PhysReg = VirtReg;
if (MRegisterInfo::isVirtualRegister(VirtReg)) { if (MRegisterInfo::isVirtualRegister(VirtReg)) {
unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg); unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);